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MFS5600AMBAFES датащи(PDF) 58 Page - NXP Semiconductors |
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MFS5600AMBAFES датащи(HTML) 58 Page - NXP Semiconductors |
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58 / 118 page ![]() NXP Semiconductors FS5600 Automotive buck regulator and controller with voltage monitors and watchdog timer Flag name Description ABIST_CRC_ERR = 1 indicates that there was an error with the CRC values in the mirror register. ABIST_OSC_ERR = 1 indicates that the 20 MHz oscillator is not within 15 % of its nominal value. BG_ERR = 1 indicates that the main and monitoring band gaps are not within 12 % of each other. ABIST_VMON1_OV_ERR = 1 indicates that the VMON1's over voltage monitor is not operating in the expected range. ABIST_VMON1_UV_ERR = 1 indicates that the VMON1's under voltage monitor is not operating in the expected range. ABIST_VMON2_OV_ERR = 1 indicates that the VMON2's over voltage monitor is not operating in the expected range. ABIST_VMON2_UV_ERR = 1 indicates that the VMON2's under voltage monitor is not operating in the expected range. ABIST_VMON3_OV_ERR = 1 indicates that the VMON3's over voltage monitor is not operating in the expected range. ABIST_VMON3_UV_ERR = 1 indicates that the VMON3's under voltage monitor is not operating in the expected range. ABIST_VMON4_OV_ERR = 1 indicates that the VMON4's over voltage monitor is not operating in the expected range. ABIST_VMON4_UV_ERR = 1 indicates that the VMON4's under voltage monitor is not operating in the expected range. ABIST_SW1_OV_ERR = 1 indicates that the SW1's over voltage monitor is not operating in the expected range. ABIST_SW1_UV_ERR = 1 indicates that the SW1's under voltage monitor is not operating in the expected range. ABIST_SW2_OV_ERR = 1 indicates that the SW2's over voltage monitor is not operating in the expected range. ABIST_SW2_UV_ERR = 1 indicates that the SW2's under voltage monitor is not operating in the expected range. Table 51. ABIST flag bits The above bits are all 0 if ABIST test is successful. 17.12.2 On-demand ABIST When in the NORMAL STATE or INIT_RUN state, an application can request an on-demand ABIST to be performed by setting the OD_ABIST bit. This OD_ABIST bit is self-clearing after completing the on-demand ABIST. FS0B is asserted low during on-demand ABIST if initiated in the INIT_RUN state. FS0B remains high during on-demand ABIST if initiated in the NORMAL state. 17.12.3 Logical built-In self-test (LBIST) The FS5600 includes a Logical Built-In Self-Test (LBIST) feature to verify functionality of the logic block in the FS5600. FS5600 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 29 April 2024 58 / 118 |
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