MFS5600AMBAFES datasheet(38/118 Pages) NXP

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NXP Semiconductors

FS5600

Automotive buck regulator and controller with voltage monitors and watchdog timer

When OTP_SW1_PULLDN_B = 0, a pulldown resistor of 500 Ω is engaged on the output if SW1 is disabled.

Similarly, when OTP_SW2_PULLDN_B = 0, a pulldown resistor of 500 ohm is engaged on the output if SW2 is

disabled. The output is disabled in high-Z if OTP_SWx_PULLDN_B = 1.

15.2.1 Programming turn-off delay

When OTP_SW1_OFF_DELAY = 0, SW1 is turned off after EN1 goes low.

When OTP_SW2_OFF_DELAY = 0, SW2 is turned off after EN2 goes low.

When OTP_SW1_OFF_DELAY = 1, SW1 is turned off 32 ms after EN1 goes low.

When OTP_SW2_OFF_DELAY = 1, SW2 is turned off 32 ms after EN2 goes low.

The 32 ms setting is useful when other devices are to be powered down in the system prior to turning off the

pre-regulators.

15.3 PGOOD1 and PGOOD2

For the QM variation of FS5600, PGOOD1 is used to indicate the voltage regulation status of SW1 and

PGOOD2 is used to indicate the voltage regulation state of SW2.

PGOOD1 is asserted low when the OV or UV monitor for SW1 indicates a faulty voltage. See Table 8 for OV/

UV thresholds. PGOOD2 is asserted low when the OV or UV monitor for SW2 indicates a faulty voltage. See

Table 18 for OV/UV thresholds.

The delay from SW1/2 reaching regulation to PGOOD1/2 being released high is programmable. See

Section 15.4 for details.

PGOOD1 and PGOOD2 are open-drain outputs and need an external pullup resistor.

For the ASIL B, and Enhanced ASIL B variations, behavior of PGOOD1 and PGOOD2 can be programmed to

indicate status of other safety functions. See Section 17.6 for details.

15.4 GPIO1/2/3

Pins 4, 14 and 13 are available as GPO1, GPO2, and GPO3 respectively in the QM variation. They can be

sequenced as part of the device power up to control external devices. The pins can be configured to perform

other functions in the ASIL B and Enhanced ASIL B versions.

OTP_GPO1/2/3_DELAY[2:0] sets the delay from SW1 or SW2’s soft-start ramp start (which occurs first) to

GPO1/2/3 being released high.

GPIO1/2/3_OUTPUT bit is set high internally, if programmed as part of the start-up based on the

OTP_GPIO1/2/3_DELAY[2:0] bits, and can be changed by the user via I2C after power-up. After power-up, the

GPIO1/2/3 pins may be toggled via I2C using the bits GPIO1_OUTPUT, GPIO2_OUTPUT and GPIO3_OUTPUT

respectively. When both EN1 and EN2 are brought low, the GPOs power down in the reverse sequence of their

power-up delays.

GPO1/2/3 pins are open-drain and need an external pullup resistor. GPIO2 pin can be configured as SYNCOUT

in a push-pull mode. See Section 14.6 for details.

PGOOD1/2 can also be delayed during start-up as shown in Table 31.

FS5600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 4 — 29 April 2024

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