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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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RT600 датащи(PDF) 82 Page - NXP Semiconductors |
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RT600 датащи(HTML) 82 Page - NXP Semiconductors |
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82 / 171 page  RT600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors B.V. 2024. All rights reserved. Product data sheet Rev. 2.2 — 25 January 2024 82 of 173 NXP Semiconductors RT600 Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4 Audio DSP CPUs In the two-counter case, the following operational elements are global to the SCTimer/PWM, but the last three can use match conditions from either counter: • Clock selection • Inputs • Events • Outputs • Interrupts 10.18.2.1 Features • Two 16-bit counters or one 32-bit counter. • Counter(s) clocked by bus clock or selected input. • Up counter(s) or up-down counter(s). • State variable allows sequencing across multiple counter cycles. • Event combines input or output condition and/or counter match in a specified state. • Events control outputs, interrupts, and the SCTimer/PWM states. – Match register 0 can be used as an automatic limit. – In bi-directional mode, events can be enabled based on the count direction. – Match events can be held until another qualifying event occurs. • Selected event(s) can limit, halt, start, or stop a counter. • Supports: – 8 inputs – 10 outputs – 16 match/capture registers – 16 events – 32 states • PWM capabilities including dead time and emergency abort functions 10.18.3 Windowed WatchDog Timer (WWDT) The purpose of the watchdog is to reset the controller if software fails to periodically service it within a programmable time window. A separate Watchdog Timer is provided for each of the two CPUs. 10.18.3.1 Features • Internally resets chip if not periodically reloaded during the programmable time-out period. • Optional windowed operation requires reload to occur between a minimum and maximum time period, both programmable. • Optional warning interrupt can be generated at a programmable time prior to watchdog time-out. • Enabled by software but requires a hardware reset or a watchdog reset/interrupt to be disabled. |
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