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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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RT600 датащи(PDF) 16 Page - NXP Semiconductors |
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RT600 датащи(HTML) 16 Page - NXP Semiconductors |
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16 / 171 page  RT600 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors B.V. 2024. All rights reserved. Product data sheet Rev. 2.2 — 25 January 2024 16 of 173 NXP Semiconductors RT600 Dual-core microcontroller with 32-bit Cortex-M33 and Xtensa HiFi4 Audio DSP CPUs PIO0_1 H2 G2 H16 Z I/O 0 PIO0_1 — General-purpose digital input/output pin. I/O 1 FC0_TXD_SCL_MISO_WS — Flexcomm 0: USART transmitter, I2C clock, SPI master-in/slave-out data I/O, I2S word select/frame. 2 R — Reserved. 3 R — Reserved O 4 CTIMER0_MAT1 — 32-bit CTimer0 match output 1. I 5 I2S_BRIDGE_WS_IN — Allows I2S bypass by re-routing this function to a pin that includes the I2S_BRIDGE_WS_OUT function. 6 R — Reserved. 7 R — Reserved I/O 8 SEC_PIO0_1 — Secure GPIO pin. PIO0_2 F5 G4 H15 Z I/O 0 PIO0_2 — General-purpose digital input/output pin. I/O 1 FC0_RXD_SDA_MOSI_DATA — Flexcomm 0: USART receiver, I2C data I/O, SPI master-out/slave-in data, I2S data I/O. 2 R — Reserved. 3 R — Reserved. O 4 CTIMER0_MAT2 — 32-bit CTimer0 match output 2. I 5 I2S_BRIDGE_DATA_IN — Allows I2S bypass by re-routing this function to a pin that includes the I2S_BRIDGE_DATA_OUT function. 6 R — Reserved. 7 R — Reserved I/O 8 SEC_PIO0_2 — Secure GPIO pin. PIO0_3 F4 H2 H14 Z I/O 0 PIO0_3 — General-purpose digital input/output pin. I/O 1 FC0_CTS_SDA_SSEL0 — Flexcomm 0: USART clear-to-send, I2C data I/O, SPI Slave Select 0. 2 R — Reserved. 3 R — Reserved. O 4 CTIMER0_MAT3 — 32-bit CTimer0 match output 3. I/O 5 FC1_SSEL2 — Flexcomm 1: SPI slave select 2. 6 R — Reserved. 7 R — Reserved I/O 8 SEC_PIO0_3 — Secure GPIO pin. Table 4. Pin description …continued Symbol Description |
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