AT89LP2052 datasheet(19/90 Pages) ATMEL

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3547F–MICRO–6/06

AT89LP2052/LP4052

14.3

Open-drain Output

The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor

of the port pin when the port register contains a logic “0”. To be used as a logic output, a port

configured in this manner must have an external pull-up, typically a resistor tied to V

CC. The pull-

down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu-

ration is shown in Figure 14-4. The input circuitry of P3.2 and P3.3 is not disabled during Power-

down (see Figure 14-3).

Figure 14-4. Open-Drain Output

14.4

Push-pull Output

The push-pull output configuration has the same pull-down structure as both the open-drain and

the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port

needed from a port output. The push-pull port configuration is shown in Figure 14-5. The input

circuitry of P3.2 and P3.3 is not disabled during Power-down (see Figure 14-3).

Figure 14-5. Push-pull Output

14.5

Port 1 Analog Functions

The AT89LP2052/LP4052 incorporates an analog comparator. In order to give the best analog

performance and minimize power consumption, pins that are being used for analog functions

must have both the digital outputs and digital inputs disabled. Digital outputs are disabled by put-

ting the port pins into the input-only mode as described in Section 14. “I/O Ports” on page 17.

Digital inputs on P1.0 and P1.1 are disabled whenever the Analog Comparator is enabled by

setting the CEN bit in ACSR. CEN forces the PWD input on P1.0 and P1.1 low, thereby disabling

the Schmitt trigger circuitry.

Port

From Port

Input

Data

PWD

Port

VCC

From Port

Input

Data

PWD

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