AT89LP2052 datasheet(89/90 Pages) ATMEL

89 / 90 page

3547F–MICRO–6/06

AT89LP2052/LP4052

Table of Contents (Continued)

Serial Peripheral Interface ..................................................................... 39

18.1Normal Mode .........................................................................................................41

18.2Enhanced Mode ....................................................................................................41

18.3Serial Clock Generator ..........................................................................................44

18.4SPI Pin Configuration ............................................................................................45

Analog Comparator ............................................................................... 46

19.1Comparator Interrupt with Debouncing .................................................................46

Programmable Watchdog Timer ........................................................... 48

Instruction Set Summary ...................................................................... 49

Programming the Flash Memory .......................................................... 54

22.1Programming Command Summary .......................................................................55

22.2Status Register ......................................................................................................56

22.3DATA Polling .........................................................................................................56

22.4Parallel Programming ............................................................................................56

22.5In-System Programming (ISP) ...............................................................................70

Electrical Characteristics ...................................................................... 75

23.1Absolute Maximum Ratings* .................................................................................75

23.2DC Characteristics ................................................................................................76

23.3Serial Peripheral Interface Timing .........................................................................77

23.4External Clock Drive ..............................................................................................79

23.5Serial Port Timing: Shift Register Mode ................................................................80

23.6Test Conditions .....................................................................................................80

Ordering Information ............................................................................. 82

24.1Standard Package .................................................................................................82

Packaging Information .......................................................................... 83

25.120P3 – PDIP ..........................................................................................................83

25.220S2 – SOIC .........................................................................................................84

25.320X – TSSOP ........................................................................................................85

Revision History...................................................................................... 86

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