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UPD17062 датащи(PDF) 142 Page - Renesas Technology Corp

номер детали UPD17062
подробное описание детали  MOS INTEGRATED CIRCUIT
PDF  298 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD17062 датащи(HTML) 142 Page - Renesas Technology Corp

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µPD17062
As shown in Fig. 12-5, if the timer carry FF setting time interval is switched, the timer error that occurs before
the BTM0CY flag is set for the first time is as follows:
-tSET < error < tCHECK
where tSET
: Newly selected timer carry FF setting time interval
tCHECK : Time interval at which the BTM0CY flag is checked
The internal pulses, 4 Hz, 10 Hz, 200 Hz, and 1 kHz, have a phase difference. However, this phase difference
is less than a newly selected set pulse interval, and included in the timer error described above.
See Section 12.6 for details about the phase difference of each pulse.
Fig. 12-5
Timer Error That Occurs When the Timer Carry FF Setting Time Interval Is Switched from A to B
(a) Timer error of -tSET
(b) Timer error of tCHECK
tSET
tSET
= 0
SKT1
BTM0CY
Internal pulse A
Internal pulse B
Timer carry FF set pulse
BTM0CY flag
True timer interval
Actual timer interval
Time interval switched here
If the BTM0CY flag is checked right
after the timer setting time interval is
switched, it appears to be 1, and therefore,
the timer error is -tSET.
Actual timer interval
True timer interval
Time interval switched here
If the timer setting time interval is
switched right after the BTM0CY flag
is checked, the BTM0CY flag remains
reset for one cycle, and therefore, the
timer error is tCHECK.
.
.
= 0
.
.
tCHECK



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