UPD17062 datasheet(46/298 Pages) RENESAS

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µPD17062

Example 2.

When BANK0 is selected and MPE = 0 is specified

MOV 04H, #8

; 04H

← 8

AND RPL, #0001B

; RP

← 0000000B; The general-purpose register is allocated in row

; address 0H in BANK0.

MOV @04H, 52H

Executing the above instruction transfers the contents of data memory address 52H to address 58H. The

MOV @r, m instruction is called an indirect transfer of the general-purpose register contents.

In this

instruction, the contents of the general-purpose register address specified in r (8 in the above example) consist

of the column address of data memory, and the row address specified in m (5 in the above example) is the

row address of data memory. That is, the data memory address is 58H (see Fig. 6-3).

See Section 8.5 for an explanation of the indirect transfer of the general-purpose register contents.

Fig. 6-3

Execution of Instructions in Example 2

Example 3.

AND RPL,

#0000B ; RP

← 0000000B; The general-purpose register is allocated in row

; address 0H of BANK0.

MOV BANK, #0010B ; BANK2

01H,

31H

02H,

32H

03H,

33H

04H,

34H

RPL,

#1000B ; RP

← 0000100B; The general-purpose register is allocated in row

; address 4H of BANK0.

05H,

45H

06H,

46H

07H,

47H

08H,

48H

789

BANK0

MOV

@ 04H, 56H

System register

Column address

General-purpose register

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