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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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UPD17062 датащи(PDF) 75 Page - Renesas Technology Corp |
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UPD17062 датащи(HTML) 75 Page - Renesas Technology Corp |
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75 / 298 page  73 µPD17062 Table 9-1 Peripheral Hardware Control Functions of Control Registers (4/5) Remark *: Retains the previous state. **: Indefinite Control register Peripheral hardware control function At reset Register Ad- dress Read/ write b3 b2 b1 b0 Symbol Function outline Set value 01 P o w e r O n S T O P C E Serial I/O0 status judge register Serial I/O0 interrupt mode register Serial I/O0 clock select register HSYNC counter gate control register HSYNC counter gate judge register 28H R 38H R/W 39H R/W 11H R/W 12H R SIO0SF8 SIO0SF9 SBSTT SBBSY 0 0 SIO0IMD1 SIO0IMD0 0 0 SIO0CK1 SIO0CK0 0 0 HSCGT1 HSCGT0 HSCGOSTT 0 0 0 Detects the contents of clock counter Detects the number of clocks (I2C bus method) Detects the start condition (I2C bus method) Fixed at 0 Sets the interrupt condition of serial interface 0 Fixed at 0 Fixed at 0 Sets the internal clock of serial interface 0 Controls the HSYNC counter gate Detects open/close of the HSYNC counter Fixed at 0 000 Resets when the contents of the clock counter become 0 or 1 Resets when the contents of the clock counter become 0 or 1 Resets when the contents of the clock counter become 8 Resets when the contents of the clock counter become 9 Sets up the start condition - 9th clock Sets up the start condition - stop condition 00 1 1 01 1 0 7th clock 8th clock 7th clock after occur- rence of start condition Stop con- dition 00 1 1 01 1 0 Gate close Gate open 1.69 ms gate open Not to be set Gate open Gate close 00 1 1 01 1 0 100 kHz 200 kHz 500 kHz 1 MHz ** * * ** * * 000 0– – |
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