UPD17062 datasheet(97/298 Pages) RENESAS

номер детали	UPD17062

подробное описание детали	MOS INTEGRATED CIRCUIT

PDF	298 Pages

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µPD17062

10.4.2

Precautions When Transferring Data With Peripheral Registers

Data is transferred between the data buffer and peripheral registers in 8-bit or 16-bit units.

A PUT or GET instruction is executed for one instruction cycle (2

µs) even if the data is 16 bits long.

When 8-bit data transfer is performed but the peripheral register execution data is seven bits, for example,

long one extra bit is added.

At data write, the status of this extra data is “Don’t care” as shown in Example 1. At data read, the status

of this extra data is “Unpredictable” as shown in Example 2.

Example 1. PUT instruction (When the valid peripheral register bits are seven bits from bit0 to bit6.)

When 8-bit data is written to a peripheral register, the status of the eight high-order bits of the data buffer

(contents of DBF3 and DBF2) is “Don’t care”.

Of the 8-bit data in the data buffer, the status of each bit that does not correspond to a valid bit in the

peripheral register is “Don’t care”.

DBF3

DBF2

DBF1

DBF0

b15

b14

b13

b12

b11

b10

Peripheral register

PUT

Data buffer

0 or unpredictable

Don't care

(Can be any value)

Valid bits

UPD17062 датащи(PDF) 97 Page - Renesas Technology Corp