UPD17062 datasheet(58/298 Pages) RENESAS

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µPD17062

8.3

BANK REGISTER (BANK)

The bank register specifies a data memory bank.

The bank register contains BANK0 upon reset. The two high-order bits of address 79H are consistently set

to 0.

Data memory is classified into three banks by the bank register. When a data memory manipulation

instruction is executed, it acts on the data memory in the bank specified by the bank register.

For example, to manipulate BANK1 data memory with BANK0 set as the current bank, the bank must first

be switched to BANK1 in the bank register.

However, system registers allocated to addresses 74H-7FH of data memory are not confined to the concept

of banks. The same system registers exist at addresses 74H-7FH of all banks. Executing MOV 78H, #0 in BANK1

and MOV 78H, #0 in BANK2 both result in writing 0 to address 78H of the system register. Therefore, system

When an interrupt is accepted, BANK is saved.

Table 8-1

Specification of Data Memory Bank

8.4

MEMORY POINTER ENABLE FLAG (MPE)

The MPE specifies whether to specify the row address for execution of the MOV @r, M and MOV M, @r

instructions by the MPL, or to perform execution with the same address. When the MPE is set, the row address

is specified by the MPL. When the MPE is reset, the instruction is executed with same row address.

However, the address specified by the MPL is the row address of the currently specified bank.

Bank request

Data memory bank

(BANK)

BANK0

BANK1

BANK2

Not to be set

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