UPD17062 datasheet(10/298 Pages) RENESAS

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µPD17062

11.5

RETURNING CONTROL FROM INTERRUPT PROCESSING ROUTINE ..................................... 116

11.6

INTERRUPT PROCESSING ROUTINE ........................................................................................... 117

11.7

EXTERNAL INTERRUPTS (INTNC PIN, VSYNC PIN) .......................................................................

121

11.8

INTERNAL INTERRUPT (TIMER, SERIAL INTERFACE) ..............................................................

123

11.9

MULTIPLE INTERRUPTS ................................................................................................................

124

12. TIMER .......................................................................................................................................... 133

12.1

TIMER CONFIGURATION .............................................................................................................. 133

12.2

TIMER FUNCTIONS ........................................................................................................................ 134

12.3

TIMER CARRY FLIP-FLOP (TIMER CARRY FF) ............................................................................

136

12.4

CAUTIONS IN USING THE TIMER CARRY FF ............................................................................. 141

12.5

TIMER INTERRUPT .........................................................................................................................

147

12.6

CAUTIONS IN USING THE TIMER INTERRUPT ..........................................................................

151

13. STANDBY .................................................................................................................................... 153

13.1

STANDBY BLOCK CONFIGURATION ........................................................................................... 153

13.2

STANDBY FUNCTION ....................................................................................................................

154

13.3

DEVICE OPERATION MODE SPECIFIED AT THE CE PIN ...........................................................

155

13.4

HALT FUNCTION ............................................................................................................................ 156

13.5

CLOCK STOP FUNCTION ............................................................................................................... 164

13.6

OPERATION OF THE DEVICE AT A HALT OR CLOCK STOP ....................................................

167

14. RESET .......................................................................................................................................... 171

14.1

RESET BLOCK CONFIGURATION .................................................................................................

171

14.2

RESET FUNCTION .......................................................................................................................... 172

14.3

CE RESET ......................................................................................................................................... 173

14.4

POWER-ON RESET .........................................................................................................................

177

14.5

RELATIONSHIP BETWEEN CE RESET AND POWER-ON RESET ..............................................

180

14.6

POWER FAILURE DETECTION ......................................................................................................

184

15. GENERAL-PURPOSE PORT ....................................................................................................... 189

15.1

CONFIGURATION AND CLASSIFICATION OF GENERAL-PURPOSE PORT ............................

189

15.2

FUNCTIONS OF GENERAL-PURPOSE PORTS ............................................................................

191

15.3

GENERAL-PURPOSE I/O PORTS (P0A, P0B, P1B, P1C) .............................................................

194

15.4

GENERAL-PURPOSE INPUT PORT (P0D) ....................................................................................

198

15.5

GENERAL-PURPOSE OUTPUT PORTS (P0C, P1A) .....................................................................

199

16. SERIAL INTERFACE .................................................................................................................... 201

16.1

SERIAL INTERFACE MODE REGISTER ........................................................................................

201

16.2

CLOCK COUNTER ........................................................................................................................... 206

16.3

STATUS REGISTER ........................................................................................................................ 207

16.4

WAIT REGISTER ............................................................................................................................. 209

16.5

PRESETTABLE SHIFT REGISTER (PSR) ....................................................................................... 214

16.6

SERIAL INTERFACE INTERRUPT SOURCE REGISTER (SIO0IMD) ...........................................

215

16.7

SHIFT CLOCK FREQUENCY REGISTER (SIO0CK) .......................................................................

216

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