MCP3910 datasheet(6/90 Pages) MICROCHIP

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MCP3910

DS20005116D-page 6

 2012-2020 Microchip Technology Inc.

1.2

Serial Interface Characteristics

Operating Current, Digital

IDD,D

—0.2

0.4

MCLK = 4 MHz,

proportional to MCLK

—0.7

—

MCLK = 16 MHz,

proportional to MCLK

Shutdown Current, Analog

IDDS,A

——

µA

AVDD pin only (Note 4)

Shutdown Current, Digital

IDDS,D

——

µA

DVDD pin only (Note 4)

Pull-Down Current on

OSC2 Pin (External Clock

mode)

IOSC2

—

µA

CLKEXT = 1

TABLE 1-2:

SERIAL DC CHARACTERISTICS

Electrical Specifications:

Unless otherwise indicated, all parameters apply at DVDD = 2.7 to 3.6 V,

TA = -40°C to +125°C (Note 1), CLOAD = 30 pF, applies to all digital I/Os.

Characteristic

Sym.

Min.

Typ.

Max.

Units

Conditions

High-Level Input Voltage

VIH

0.7 DVDD

—

Schmitt triggered

Low-Level Input Voltage

VIL

——

0.3 DVDD

Schmitt triggered

Input Leakage Current

ILI

——

±1

µA

CS = DVDD, VIN = DGND to DVDD

Output Leakage Current

ILO

—

±1

µA

CS = DVDD,

VOUT = DGND or DVDD

Hysteresis of

Schmitt Trigger Inputs

VHYS

—300

—

DVDD = 3.3V only (Note 3)

Low-Level Output Voltage

VOL

——

0.4

IOL = +1.7 mA, DVDD = 3.3V

High-Level Output Voltage

VOH

DVDD –0.5

—

IOH = -1.7 mA, DVDD = 3.3V

Internal Capacitance

(All Inputs and Outputs)

CINT

——

TA = +25°C, SCK = 1.0 MHz,

DVDD = 3.3V (Note 2)

Note 1:

All specifications are valid down to -45°C operation.

This parameter is periodically sampled and not 100% tested.

This parameter is established by characterization and not production tested.

TABLE 1-1:

ANALOG SPECIFICATIONS (CONTINUED)

Electrical Specifications:

Unless otherwise indicated, all parameters apply at AVDD = DVDD = 3V, MCLK = 4 MHz;

PRE[1:0] = 00; OSR = 256; GAIN = 1; VREFEXT = 0, CLKEXT = 1, DITHER[1:0] = 11; BOOST[1:0] = 10, VCM =0V;

TA = -40°C to +125°C (Note 1); VIN =1.2 VPP = -0.5 dBFS @ 50/60 Hz on all channels.

Characteristic

Sym.

Min.

Typ.

Max.

Units

Conditions

Note 1:

All specifications are valid down to -45°C operation.

This specification implies that the ADC output is valid over this entire differential range and that there is no

distortion or instability across this input range. Dynamic Performance specified at -0.5 dB below the maximum

signal range, VIN =1.2 VPP = 424 mVRMS, VREF = 1.2V @ 50/60 Hz. See Section 4.0 “Terminology and

Formulas”

for definition. This parameter is established by characterization and not 100% tested.

For these operating currents, the following Configuration bit settings apply: SHUTDOWN[1:0] = 00,

RESET[1:0] = 00, VREFEXT = 0, CLKEXT = 0.

For these operating currents, the following Configuration bit settings apply: SHUTDOWN[1:0] = 11,

VREFEXT = 1, CLKEXT = 1.

Applies to all gains. Offset and gain errors depend on PGA gain setting. See Section 2.0 “Typical

Performance Curves”

for typical performance.

Outside this range, the ADC accuracy is not specified. An extended input range of ±2V can be applied

continuously to the part with no damage.

For proper operation and for optimizing the ADC accuracy, AMCLK should be limited to the maximum

frequency, defined in Table 5-2, as a function of the BOOST and PGA setting chosen. MCLK can take larger

values as long as the prescaler settings (PRE[1:0]) limit AMCLK = MCLK/PRESCALE within the defined

range in Table 5-2.

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