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MCP3910 датащи(PDF) 34 Page - Microchip Technology |
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MCP3910 датащи(HTML) 34 Page - Microchip Technology |
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34 / 90 page ![]() MCP3910 DS20005116D-page 34 2012-2020 Microchip Technology Inc. 5.4 SINC3 + SINC1 Filter The decimation filter present in all channels of the MCP3910 is a cascade of two SINC filters (SINC3 +SINC1): a third-order SINC filter with a decimation ratio of OSR3, followed by a first-order SINC filter with a decimation ratio of OSR1 (moving average of OSR1 values). Figure 5-3 represents the decimation filter architecture. FIGURE 5-3: MCP3910 Decimation Filter Block Diagram. Modulator Output SINC 3 SINC 1 Decimation Filter Output OSR3 OSR1 4 16 (WIDTH = 0) 24 (WIDTH = 1) Decimation Filter OSR1 = 1 |
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