CS4525 datasheet(43/91 Pages) CIRRUS

43 / 91 page

DS726A1

CS4525

the Aux Config register. Because the delay interface uses the auxiliary port clock signals, the auxiliary

serial port must be enabled using the EnAuxPort bit in the Aux Port Configuration register to allow the

delay interface to operate properly.

6.1.6.2

External Warning Input Port

When implementing external PWM power stage devices with thermal warning indicator outputs, it can be

useful to provide these warning signals as in input to the internal thermal foldback algorithm. This allows

the CS4525 to automatically respond to the external devices’ thermal warning conditions without com-

pletely disrupting the system’s operation.

When configured as an external warning input port, the DLY_SDIN/EX_TWR is an active-low thermal

warning input to the foldback algorithm and the DLY_SDOUT pin becomes high-impedance.

In order for the foldback algorithm to act on the external thermal warning input signal, the thermal foldback

algorithm must be enabled by the EnTherm bit in the Foldback Cfg register. See “Thermal Foldback” on

page 39 for more information.

6.1.7

PWM Output Configuration

The CS4525 supports flexible PWM output configurations to enable a wide variety of system implemen-

tations. The 3 internal modulators can be used to generate multiple power output configurations and a

number of independently selected logic-level PWM output channel combinations. PWM PopGuard is

available for pop-free power up in half-bridge configurations, and PWM signal delays may be inserted to

manage system switching noise.

6.1.7.1

PWM Power Output Configurations

Three PWM power output configurations are supported as shown in Table 7 below. The configurations

support stereo full-bridge, stereo half-bridge with full-bridge LFE, and mono parallel full-bridge output.

Referenced Control

AuxI²S/LJ............................. “Aux/Delay Serial Port Digital Interface Format (AuxI²S/LJ)” on page 67

EnAuxPort ........................... “Enable Aux Serial Port (EnAuxPort)” on page 67

Referenced Control

EnTherm ............................. “Enable Thermal Foldback (EnTherm)” on page 69

OutputCfg[1:0]

Power Configuration

Output Signal

Output Pin(s)

2 Ch. Full-Bridge

Channel 1 +

Channel 1 -

Channel 2 +

Channel 2 -

OUT1

OUT2

OUT3

OUT4

2 Ch. Half-Bridge

1 Ch. Full-Bridge

Channel 1 +

Channel 2 +

Channel 3 +

Channel 3 -

OUT1

OUT2

OUT3

OUT4

1 Ch. Parallel Full-Bridge

Channel 1 +

Channel 1 -

OUT1, OUT2

OUT3, OUT4

Table 7. PWM Power Output Configurations

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