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CS4525 датащи(PDF) 42 Page - Cirrus Logic |
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CS4525 датащи(HTML) 42 Page - Cirrus Logic |
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42 / 91 page ![]() 42 DS726A1 CS4525 6.1.5 Auxiliary Serial Output The CS4525 includes a stereo auxiliary serial output which allows an external device to leverage on its internal signal processing and routing capabilities. The auxiliary serial output can receive its data from any of the sources shown in the Digital Signal Flow diagram on page 29. The supported output data routing configurations are shown in Table 6 below. By default, the serial port is configured to output channels 1 and 2 on the auxiliary output data channels 1 and 2 respectively. The data output on each channel is set by the LChDSel[1:0] and RChDSel[1:0] bits in the Aux Port Con- figuration register. The auxiliary port can be enabled using the EnAuxPort bit in the same register. When enabled, the port operates as a master and clocks out data in the format dictated by the AuxI²S/LJ bits. When disabled, the AUX_LRCK, AUX_SCLK, and AUX_SDOUT pins continuously drive a logic ‘0’. 6.1.6 Serial Audio Delay & Warning Input Port The CS4525 includes a configurable delay and warning port to allow easy system integration of external lip-sync delay devices or warning inputs from external amplifiers. The port can be configured as a serial audio delay interface, an external warning input port, or disabled by the DlyPortCfg[1:0] bits in the Aux Config register. When disabled, the DLY_SDOUT and DLY_SDIN/EX_TWR pins become high-imped- ance. 6.1.6.1 Serial Audio Delay Interface Video processing and reproduction circuitry in digital video display devices can often introduce noticeably more delay than is introduced by the device’s audio processing and reproduction circuitry. This can result in a phenomenon known as lip-synch delay - a delay present between the video and audio content being reproduced. To help overcome this problem, the CS4525 delay and warning port can be configured as serial audio delay interface. This interface consists of a serial audio input/output port to facilitate the use of an external serial audio delay device. The port routes the serial data from the selected input source (the ADC or the serial input port) out to an external serial audio delay device, and then back in to the CS4525 internal dig- ital sound processing blocks. The delay serial audio interface signals include DLY_SDOUT and DLY_SDIN/EX_TWR and are clocked from AUX_LRCK and AUX_SCLK. The serial data is output on the DLY_SDOUT pin and input on the DLY_SDIN/EX_TWR in the format specified by the AuxI²S/LJ bits in LChDSel[1:0] Aux Left Channel Data RChDSel[1:0] Aux Right Channel Data 00 Channel A 00 Channel A 01 Channel B 01 Channel B 10 LFE Channel 10 LFE Channel 11 Channel B X-Over HPF 11 Channel B X-Over LPF Table 6. Auxiliary Serial Port Data Output Referenced Control Register Location EnAuxPort ........................... “Enable Aux Serial Port (EnAuxPort)” on page 67 LChDSel[1:0]....................... “Aux Serial Port Left Channel Data Select (LChDSel[1:0])” on page 68 RChDSel[1:0] ...................... “Aux Serial Port Right Channel Data Select (RChDSel[1:0])” on page 67 AuxI²S/LJ............................. “Aux/Delay Serial Port Digital Interface Format (AuxI²S/LJ)” on page 67 Referenced Control Register Location DlyPortCfg........................... “Delay & Warning Port Configuration (DlyPortCfg[1:0])” on page 67 |
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