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CS4525 датащи(PDF) 53 Page - Cirrus Logic |
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CS4525 датащи(HTML) 53 Page - Cirrus Logic |
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53 / 91 page ![]() DS726A1 53 CS4525 6.2.7 Automatic Power Stage Shut-Down To protect itself from permanent damage, the CS4525 will automatically shut down its internal PWM pow- er output stages when a thermal error, PWM power output over-current error, or VP under-voltage condi- tion occurs. In the shut-down state, all digital functions of the device will operate as normal, however the PWM power output pins become high-impedance. The levels of the over-current error, thermal error, and VP under-voltage trip points are listed in the PWM Power Output Characteristics table on page 20. Automatic shut-down will occur whenever any of these preset thresholds are crossed. Once in the shut-down state, the RST signal must be toggled low and then high to resume normal device operation. 6.3 PWM Modulators and Sample Rate Converters The CS4525 includes 3 pairs of PWM modulators and sample rate converters, each clocked from the ex- ternal crystal or system clock applied at power-up. All 3 modulator and sample rate converter pairs are avail- able in software mode (see Figure 14 on page 29), and 2 pairs are used in hardware mode (see Figure 23 on page 51). One of the characteristics of a PWM modulator is that the frequency content of the out-of-band noise gen- erated is dependent on the PWM switching frequency. As the power stage external LC and snubber filter component values are used to attenuate this out-of band energy, their component values are also based on this switching frequency. To easily accommodate input sample rates ranging from 32 kHz to 96 kHz without requiring the adjustment of output filter component values, the CS4525 utilizes a sample rate converter (SRC) to keep the PWM switching frequency fixed regardless of the input sample rate. The SRC operates by upsampling the variable input sample rate to a fixed output switching rate, typically 384 kHz for most audio applications. Table 14 below shows the PWM output switching rate and quantization levels as a function of the supplied external crystal or system clock. Additionally, as the output of the SRC is clocked from a very stable crystal or oscillator, the SRC also allows the PWM modulator output to be independent of the input serial audio clock jitter. This results in very low jitter PWM output and higher dynamic range. Supplied XTAL or SYS_CLK Frequency PWM Switch Rate Quantization Levels 18.432 MHz 384 kHz 48 24.576 MHz 384 kHz 64 27.000 MHz 421.875 kHz 64 Table 14. PWM Output Switching Rates and Quantization Levels |
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