FS6407 datasheet(94/111 Pages) NXP

94 / 111 page

NXP Semiconductors

FS6407/FS6408

Table 72. WD Window. Description and configuration of the bits (default value in bold)

WD_Window_3:0

Description

Configure the watchdog window duration. Duty cycle if set to 50%

0000

DISABLE

0001

1.0 ms

0010

2.0 ms

0011

3.0 ms

0100

4.0 ms

0101

6.0 ms

0110

8.0 ms

0111

12 ms

1000

16 ms

1001

24 ms

1010

32 ms

1011

64 ms

1100

128 ms

1101

256 ms

1110

512 ms

1111

1024 ms

Reset condition

Power On Reset

Secure3:0

Description

Secured bits based on write bits

Secured_3 = NOT(bit5)

Secured_2 = NOT(bit4)

Secured_1 = bit7

Secured_0 = bit6

SPI_FS_err

Description

Secured SPI communication check, concerns fail-safe logic only

0No error

Error detected in the secured bits

Reset condition

Power On Reset

SPI_FS_CLK

Description

SCLK error detection, concerns internal error in fail-safe logic only and external errors (at pin level) for both

main and fail-safe logics. Other errors flagged by the SPI_CLK bit.

16 clock cycles during NCS low

Wrong number of clock cycles (<16 or >16)

Reset condition

Power On Reset

SPI_FS_Req

Description

Invalid SPI access (Wrong Write or Read, Write to INIT registers in normal mode, wrong address), concerns

fail-safe logic only

0No error

SPI violation

Reset condition

Power On Reset

SPI_FS_Parity

Description

SPI parity bit error detection, concerns fail-safe logic only

Parity bit OK

Parity bit ERROR

Reset condition

Power On Reset

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