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FS6407 датащи(PDF) 28 Page - NXP Semiconductors

номер детали FS6407
подробное описание детали  Power system basis chip with high speed can transceiver
PDF  111 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6407 датащи(HTML) 28 Page - NXP Semiconductors

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FS6407/FS6408
6
Functional device operation
6.1
Mode and state description of main state machine
The device has several operation modes. The transition and conditions to enter or leave each mode are illustrated in the functional state
diagram (Figure 10). Two state machines are working in parallel. The Main state machine is in charge of the power management (VPRE,
VCORE, VCCA, VAUX,...) and the fail-safe state machine is in charge of all the safety aspect (WD, RSTB, FS0B,...).
6.1.1
Buck or buck boost configuration
An external low-side logic level MOSFET (N-type) is required to operate in non-inverting buck-boost converter. The connection of the
external MOSFET is detected automatically during the start-up phase (after a Power On Reset or From LPOFF).
• If the external low-side MOSFET is NOT connected (GATE_LS pin connected to PGND), the product is configured as a standard
buck converter.
• If the external low-side MOSFET is connected (GATE_LS pin connected to external MOSFET gate), the product is configured as a
non-inverting buck-boost converter.
The automatic detection is accomplished by pushing a 300
μA current on Gate_LS pin and monitoring the corresponding voltage
generated. If a voltage >120 mV is detected before the 120
μs timeout, the non-inverting buck-boost configuration is locked. Otherwise,
the standard buck configuration is locked. The boost driver has a current capability of
±300 mA.
6.1.2
VPRE on
Pre-regulator is an SMPS regulator. In this phase, the pre-regulator is switched ON and a softstart with a specified duration tPRE_SOFT is
started to control the VPRE output capacitor charge.
6.1.3
Select pin configuration
This phase is detecting the required voltage level on VAUX and VCCA, according to resistor value connected between the SELECT pin
and ground. If the SELECT pin is connected to VPRE via the resistor, it disables the VAUX regulator at start-up.
6.1.4
VCORE/VAUX/VCCA on
In this stage, the three regulators VCORE, VAUX, and VCCA are switched ON at the same time with a specified soft start duration. The
CAN_5V is also started at that time.
6.1.5
INIT main
This mode is automatically entered after the device is “Powered ON”. When RSTB is released, initialization phase starts where the device
can be configured via the SPI. During INIT phase, some registers can only be configured in this mode (refer to Table 14 and Table 15).
Other registers can be written in this mode, and also in Normal mode.
Once the INIT registers configurations are complete, a last register called “INIT INT” must be configured to switch to Normal mode. Writing
data in this register (even same default values), automatically locks the INIT registers, and the product switches automatically to Normal
mode in the Main state machine.
6.1.6
Normal
In this mode, all device functions are available. This mode is entered by a SPI command from the INIT phase by writing in the INIT INT
register. While in Normal mode, the device can be set to Low Power mode (LPOFF) using secured SPI command.



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