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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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FS6407 датащи(PDF) 81 Page - NXP Semiconductors |
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FS6407 датащи(HTML) 81 Page - NXP Semiconductors |
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81 / 111 page  NXP Semiconductors 81 FS6407/FS6408 7.3.18 Mode Table 50. Diag SPI. Description and configuration of the bits (default value in blue) SPI_err Description Secured SPI communication check 0 No error 1 Error detected in the secured bits Reset condition Power On Reset / Read SPI_CLK Description SCLK error detection 0 16 clock cycles during NCS low 1 Wrong number of clock cycles (<16 or > 16) Reset condition Power On Reset / Read SPI_req Description Invalid SPI access (Wrong Write or Read, Write to INIT registers in normal mode, wrong address) 0 No error 1 SPI violation Reset condition Power On Reset / Read SPI_parity Description SPI parity bit error detection 0 Parity bit OK 1 Parity bit error Reset condition Power On Reset / Read Table 51. MODE register description Write bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 1 010 10 1 P 00 Goto_L POFF INT_re quest Secure _3 Secure _2 Secure _1 Secure _0 MISO SPI_G WU CAN_G Reserv ed IO_G Vpre_G Vcore_ G Vothers _G Reserv ed Reserv ed Reserv ed Reserv ed INIT Normal Reserv ed Reserv ed Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 0 010 10 10 000 00 00 0 MISO SPI_G WU CAN_G Reserv ed IO_G Vpre_G Vcore_ G Vothers _G Reserv ed Reserv ed Reserv ed Reserv ed INIT Normal Reserv ed Reserv ed |
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