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AT25QL641 датащи(PDF) 17 Page - Renesas Technology Corp |
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AT25QL641 датащи(HTML) 17 Page - Renesas Technology Corp |
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17 / 80 page ![]() DS-AT25QL641-130 Rev. G Page 17 Sep 14, 2022 © 2022 Renesas Electronics AT25QL641 Datasheet 1. X = don’t care 2. L = Lower; U = Upper 3. If any Erase or Program command specifies a memory region that contains protected data portion, this command is ignored. 4. Note 3 does not apply to this Status Register Bit setting. See Errata 2 at the end of this document for details. Table 6. Status Register Memory Protection (CMP = 1) Status Register Bits Memory Protection SEC TB BP2 BP1 BP0 Sector(s) Address Range Density Portion of Memory X X 0 0 0 0 through 127 000000h - 7FFFFFh 8 MB ALL 0 0 0 0 1 0 through 125 000000h – 7DFFFFh 8,064 kB Lower 63/64 0 0 0 1 0 0 and 121 000000h – 7BFFFFh 7,936 kB Lower 31/32 0 0 0 1 1 0 through 119 000000h – 77FFFFh 7,680 kB Lower 15/16 0 0 1 0 0 0 through 111 000000h – 6FFFFFh 7,168 kB Lower 7/8 0 0 1 0 1 0 through 95 000000h – 5FFFFFh 6 MB Lower 3/4 0 0 1 1 0 0 through 63 000000h – 3FFFFFh 4 MB Lower 1/2 0 1 0 0 1 2 through 127 020000h - 7FFFFFh 8,064 kB Upper 63/64 0 1 0 1 0 4 and 127 040000h - 7FFFFFh 7,936 kB Upper 31/32 0 1 0 1 1 8 through127 080000h - 7FFFFFh 7,680 kB Upper 15/16 0 1 1 0 0 16 through 127 100000h - 7FFFFFh 7,168 kB Upper 7/8 0 1 1 0 1 32 through 127 200000h - 7FFFFFh 6 MB Upper 3/4 0 1 1 1 0 64 through 127 400000h - 7FFFFFh 4 MB Upper 1/2 X X 1 1 1 NONE NONE NONE NONE 1 0 0 0 1 0 through 127 000000h - 7FEFFFh 8,188 kB L – 2047/2048 1 0 0 1 0 0 through 127 000000h - 7FDFFFh 8,184 kB L – 1023/1024 1 0 0 1 1 0 through 127 000000h - 7FBFFFh 8,176 kB L – 511/512 1 0 1 0 X 0 through 127 000000h - 7F7FFFh 8,160 kB L – 255/256 1 1 0 0 1 0 through 127 001000h - 7FFFFFh 8,188 kB U – 2047/2048 4 1 1 0 1 0 0 through 127 002000h - 7FFFFFh 8,184 kB U – 1023/1024 1 1 0 1 1 0 through 127 004000h - 7FFFFFh 8,176 kB U – 511/512 1 1 1 0 X 0 through 127 008000h - 7FFFFFh 8,160 kB U – 255/256 |
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