AT25QL641 datasheet(29/80 Pages) RENESAS

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DS-AT25QL641-130 Rev. G

Page 29

Sep 14, 2022

AT25QL641 Datasheet

8.10 Fast Read (0Bh)

The Fast Read command is high-speed reading mode that it can operate at the highest possible frequency of FR.

The address is latched on the rising edge of the SCK. After the 24-bit address, this is accomplished by adding

dummy clocks as shown in Figure 16. The dummy clocks means the internal circuits require time to set up the

initial address. During the dummy clocks, the data value on the SO pin is a don’t care. Data of each bit shifts out

on the falling edge of SCK.

Figure 16. Fast Read Command (SPI Mode)

Fast Read in QPI Mode

When QPI mode is enabled, the number of dummy clock is configured by the Set Read Parameters (C0h)

command to accommodate wide range applications with different needs for either maximum Fast Read frequency

or minimum data access latency. The number of dummy clock cycles can be configured as either 4, 6 or 8 by

setting bits P[5:4] in the 8-bit parameter of the Set Read Parameters (C0h) command as shown in Table 12,

Encoding of P[5:4] Bits. The default number of dummy clocks upon power up or after a Reset command is 4. See

Figure 17.

Figure 17. Fast Read Command (QPI Mode)

SCK

234

579

810

High-Impedance

24-Bit Address

Command

0Bh

SCK

High-Impedance

Dummy Clocks

Data Out

Mode 3

Mode 0

SCK

1011

1213

Dummy Clocks*

* = “Set Read Parameters” command (C0h) can set the number of dummy clocks

Data Out 1 Data Out 2 Data Out 3

A23-16

A15-8

A7-0

Mode 3

Mode 0

Command

0Bh

MSB

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