MEC1632 datasheet(87/636 Pages) MICROCHIP

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DS00001592B-page 87

MEC1632

6.8.1

SERIRQ MODE BIT FUNCTION

6.8.1.1

IRQSER Cycle Control

There are two modes of operation for the IRQSER Start Frame.

Quiet (Active) Mode

Any device may initiate a Start Frame by driving the IRQSER low for one clock, while the IRQSER is Idle. After driving

low for one clock, the IRQSER must immediately be tri-stated without at any time driving high. A Start Frame may not

be initiated while the IRQSER is active. The IRQSER is Idle between Stop and Start Frames. The IRQSER is active

between Start and Stop Frames. This mode of operation allows the IRQSER to be Idle when there are no IRQ/Data

transitions which should be most of the time.

Once a Start Frame has been initiated, the host controller will take over driving the IRQSER low in the next clock and

will continue driving the IRQSER low for a programmable period of three to seven clocks. This makes a total low pulse

width of four to eight clocks. Finally, the host controller will drive the IRQSER back high for one clock then tri-state.

Any IRQSER Device (i.e., The MEC1632) which detects any transition on an IRQ/Data line for which it is responsible

must initiate a Start Frame in order to update the host controller unless the IRQSER is already in an IRQSER Cycle and

the IRQ/Data transition can be delivered in that IRQSER Cycle.

Continuous (Idle) Mode

Only the Host controller can initiate a Start Frame to update IRQ/Data line information. All other IRQSER agents become

passive and may not initiate a Start Frame. IRQSER will be driven low for four to eight clocks by host controller. This

mode has two functions. It can be used to stop or idle the IRQSER or the host controller can operate IRQSER in a con-

tinuous mode by initiating a Start Frame at the end of every Stop Frame.

An IRQSER mode transition can only occur during the Stop Frame. Upon reset, IRQSER bus is defaulted to continuous

mode, therefore only the host controller can initiate the first Start Frame. Slaves must continuously sample the Stop

Frames pulse width to determine the next IRQSER Cycle’s mode.

IRQSER Data Frame

Once a Start Frame has been initiated, the MEC1632 will watch for the rising edge of the Start Pulse and start counting

IRQ/Data Frames from there. Each IRQ/Data Frame is three clocks: Sample phase, Recovery phase, and Turn-around

phase. During the sample phase, the MEC1632 must drive the IRQSER (SIRQ pin) low, if and only if, its last detected

IRQ/Data value was low. If its detected IRQ/Data value is high, IRQSER must be left tri-stated. During the recovery

phase, the MEC1632 must drive the SERIRQ high, if and only if, it had driven the IRQSER low during the previous sam-

ple phase. During the turn-around phase, the MEC1632 must tri-state the SERIRQ. The MEC1632 drives the IRQSER

line low at the appropriate sample point if its associated IRQ/Data line is low, regardless of which device initiated the

start frame.

The Sample phase for each IRQ/Data follows the low to high transition of the Start Frame pulse by a number of clocks

equal to the IRQ/Data Frame times three, minus one e.g. The IRQ5 Sample clock is the sixth IRQ/Data Frame, then the

sample phase is {(6 x 3) - 1 = 17} the seventeenth clock after the rising edge of the Start Pulse.

TABLE 6-4:

SERIRQ_EN CONFIGURATION CONTROL

CR25 Bit[2]

Name

Description

SERIRQ_EN

Serial IRQ Disabled

Serial IRQ Enabled (Default)

TABLE 6-5:

IRQSER SAMPLING PERIODS

IRQSER Period

Signal Sampled

# of Clocks Past Start

1Not Used

2IRQ1

nSMI/IRQ2

4IRQ3

5IRQ4

6IRQ5

7IRQ6

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