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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LSM6DSO32 датащи(PDF) 119 Page - STMicroelectronics |
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LSM6DSO32 датащи(HTML) 119 Page - STMicroelectronics |
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119 / 153 page  DocID032891 Rev 1 119/153 LSM6DSO32 Embedded functions register description 153 11.36 FSM_OUTS16 (5Bh) FSM16 output register (r) Table 231. FSM_OUTS16 register description 11.37 EMB_FUNC_ODR_CFG_B (5Fh) Finite State Machine output data rate configuration register (r/w) Table 233. EMB_FUNC_ODR_CFG_B register description Table 230. FSM_OUTS16 register P_X N_X P_Y N_Y P_Z N_Z P_V N_V P_X FSM16 output: positive event detected on the X-axis. (0: event not detected; 1: event detected) N_X FSM16 output: negative event detected on the X-axis. (0: event not detected; 1: event detected) P_Y FSM16 output: positive event detected on the Y-axis. (0: event not detected; 1: event detected) N_Y FSM16 output: negative event detected on the Y-axis. (0: event not detected; 1: event detected) P_Z FSM16 output: positive event detected on the Z-axis. (0: event not detected; 1: event detected) N_Z FSM16 output: negative event detected on the Z-axis. (0: event not detected; 1: event detected) P_V FSM16 output: positive event detected on the vector. (0: event not detected; 1: event detected N_V FSM16 output: negative event detected on the vector. (0: event not detected; 1: event detected) Table 232. EMB_FUNC_ODR_CFG_B register 0(1) 1. This bit must be set to '0' for the correct operation of the device. 1(2) 2. This bit must be set to '1' for the correct operation of the device. 0(1) FSM_ ODR1 FSM_ ODR0 0(1) 1(2) 1(2) FSM_ODR[1:0] Finite State Machine ODR configuration: (00: 12.5 Hz; 01: 26 Hz (default); 10: 52 Hz; 11: 104 Hz) |
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