ECE1200 datasheet(53/87 Pages) MICROCHIP

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DS00003093C Draft-page 53

ECE1200

6.11.2

CLOCK CONTROL LOCK REGISTER

6.11.3

CLKRUN CONTROL REGISTER

Index

3Bh of Logical Device 01h

Bits

Description

Type

Default

Reset Event

7:5 Reserved

4 CLKRUN_EN_LK

‘1’ = The CLKRUN_EN bit in the CLKRUN Control Register is

locked Read-Only in its current state. The ‘1’ value written here

remains, read-only, until the next reset event.

‘0’ = The CLKRUN_EN bit is Read/Write. (default)

R/W/L

PLTRST

3 CLKRUN_CLK1_LK

‘1’ = The CLKRUN_CTL_EN_1 bit in the Clock Enable Register

is locked Read-Only in its current state. The ‘1’ value written

here remains, read-only, until the next reset event.

‘0’ = The CLKRUN_CTL_EN_1 bit is Read/Write. (default)

R/W/L

PLTRST

2 CLKRUN_CLK0_LK

‘1’ = The CLKRUN_CTL_EN_0 bit in the Clock Enable Register

is locked Read-Only in its current state. The ‘1’ value written

here remains, read-only, until the next reset event.

‘0’ = The CLKRUN_CTL_EN_0 bit is Read/Write. (default)

R/W/L

PLTRST

1 CLK1_EN_LK

‘1’ = The CLK1_EN bit in the Clock Enable Register is locked

Read-Only in its current state. The ‘1’ value written here

remains, read-only, until the next reset event.

‘0’ = The CLK1_EN bit is Read/Write. (default)

R/W/L

PLTRST

0 CLK0_EN_LK

‘1’ = The CLK0_EN bit in the Clock Enable Register is locked

Read-Only in its current state. The ‘1’ value written here

remains, read-only, until the next reset event.

‘0’ = The CLK0_EN bit is Read/Write. (default)

R/W/L

PLTRST

Index

3Ch of Logical Device 01h

Bits

Description

Type

Default

Reset Event

7:1 Reserved

0 CLKRUN_EN

‘1’ = The CLKRUN# feature is enabled.

‘0’ = The CLKRUN# feature is disabled and cannot stop the

LPC_CLK0 or LPC_EN1 clock. (default)

This bit is lockable in the Clock Control Lock Register.

R/W/L

PLTRST

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