ECE1200 datasheet(33/87 Pages) MICROCHIP

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DS00003093C Draft-page 33

ECE1200

6.0

DEVICE REGISTER SET AND INITIALIZATION

6.1

Introduction

This chapter defines the register set of the ECE1200 device, and the mechanism used to access them.

All accesses to ECE1200 internal registers use the Plug-and-Play Configuration Port mechanism, which occupies only

two contiguous bytes in an otherwise unused section of the Host I/O addressing space. All other I/O and Memory traffic

directed to the ECE1200 is transparently presented on the LPC bus, and this happens immediately without any require-

ment for setup. This includes passing other Plug-and-Play traffic directly and immediately to other devices’ Configuration

Ports, such as 2Eh/2Fh and 4Eh/4Fh, allowing them to be initialized first.

It is, however, necessary eventually to access the internal register set, because this is where the Master resources asso-

ciated with the Serial IRQ and CLKRUN# features are configured and enabled, and where optimizations for additional

power saving may be selected. The ECE1200 device uses the same Plug-and-Play Configuration Port to provide

access to registers that have Runtime as well as Configuration purposes.

Initially the Configuration Port resides at I/O addresses 008Ch (INDEX) and 008Dh (DATA), chosen so that it is reliably

out of the way of legacy I/O traffic. But it can be moved to any other desired address at a 2-byte boundary, where the

first (“even”) address is the INDEX byte, followed by the DATA byte at the next (“odd”) byte address.

6.2

Terminology

According to Plug-and-Play standards, registers fall into regions defined as “Global” or “Logical Device”.

6.3

The Host-accessible Plug-and-Play Configuration port is the means of accessing internal registers, which are organized

as shown in FIGURE 6-1: on page 34.

The INDEX I/O location is written with an “Index” value to select the register to be accessed. The DATA I/O location is

then used with 8-bit I/O Read or Write instructions to access the selected register.

There is a single Global region which resides at Index values of 00h through 2Fh. As defined above, these registers are

not subject to bank selection, and are therefore accessible at all times.

Within the Global region, there is a register called “Logical Device Number”, residing at Index 07h. Writing an 8-bit value

here selects a Logical Device bank of registers, which may then be accessed using Indexes 30h through FFh.

In this device, there are two Logical Devices:

• Logical Device number 00h is the “eSPI Logical Device”, holding registers that manage the Host CPU interface.

• Logical Device number 01h is the “LPC Logical Device”, holding registers that manage the LPC, SERIRQ and

CLKRUN# functionality.

Sequence to Access a Logical Device Register:

a) Select the Logical Device using the Logical Device Number Register, by writing 07h into the INDEX Port and then

the Logical Device number value (00h or 01h) to the DATA Port.

b) Write the address of the desired Logical Device register to the INDEX Port and then write or read the value of the

Note 1: If accessing a Global Register, step (a) is not required.

2: Any write to an undefined or Reserved register is terminated normally on the eSPI bus without any modifi-

cation of state in the ECE1200. Any read to a Reserved register returns 00h.

TABLE 6-1:

TERMINOLOGY

Term

Definition

Global Registers

Registers that are always accessible via the Configuration Port.

Logical Device Registers

Registers belonging to a “Logical Device” in the device. These registers are

bank-selected into a shared region, using one of the Global Registers to

make the selection.

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