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MCP3461RT-E/ST датащи(PDF) 76 Page - Microchip Technology

номер детали MCP3461RT-E/ST
подробное описание детали  Two/Four/Eight-Channel, 153.6 ksps, Low-Noise, 16-Bit Delta-Sigma ADCs with Internal Voltage Reference
PDF  118 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3461RT-E/ST датащи(HTML) 76 Page - Microchip Technology

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MCP3461/2/4R
DS20006404C-page 76
 2020-2021 Microchip Technology Inc.
If the COMMAND byte defines a Static Read of the
ADCDATA register (address: 0x0), the ADC data will be
present on SDO and will be updated continuously at
each read. In this case, when a data ready interrupt
occurs within a read, the data are not corrupted and will
be updated to a new value after the old value has been
completely read.
The ADC register contains a double buffer that
prevents data from being corrupted while reading it.
The part is able to stream output data continuously with
no additional command if the communication is not
stopped with a CS rising edge. Figure 6-9 represents
the continuous streaming of incoming ADCDATA
through the SPI port with both SPI Modes 0,0 and 1,1.
FIGURE 6-9:
Continuous ADC Read (Data Streaming) with SPI Mode 0,0 and 1,1.
SPI Mode 0,0; ADC Data Format: 32-Bit
Don’t care
SCK
SDI
SDO
CS
DATA0<31>
Hi-Z
Device latches SDI on rising edge
Device latches SDO on falling edge
Don’t care
Don’t care
Hi-Z
Device latches SDI on rising edge
Device latches SDO on falling edge
R/W
Don’t care
SCK
SDI
SDO
CS
Don’t care
SCK
SDI
SDO
CS
IRQ
DATA1<31>
DATA0<31>
The falling edge after Read Start
clears the DR interrupt on IRQ pin
SDO changes synchronously with the IRQ
falling edge (DR interrupt flag)
only when MSB is present on SDO
DR Interrupt
(DATA1 is ready)
The falling edge after Read Start
clears the DR interrupt on IRQ pin
DATA0<0>
SPI Mode 1,1; ADC Data Format: 32-Bit
IRQ
Read Start
Read Start
Read Start
Read Start
DR Interrupt
(DATA1 is ready)
The falling edge after Read Start
clears the DR interrupt on IRQ pin
The falling edge after Read Start
clears the DR interrupt on IRQ pin



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