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MCP3461RT-E/ST датащи(PDF) 7 Page - Microchip Technology

номер детали MCP3461RT-E/ST
подробное описание детали  Two/Four/Eight-Channel, 153.6 ksps, Low-Noise, 16-Bit Delta-Sigma ADCs with Internal Voltage Reference
PDF  118 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3461RT-E/ST датащи(HTML) 7 Page - Microchip Technology

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 2020-2021 Microchip Technology Inc.
DS20006404C-page 7
MCP3461/2/4R
Analog Inputs
Input Voltage at Input Pin
CHN
AGND –0.1
AVDD + 0.1
V
Analog inputs are measured
with respect to AGND
Differential Input Range
VIN
-VREF/Gain
+VREF/Gain
V
Differential Input Impedance
(Note 5)
ZIN
510
k
GAIN = 0.33x, proportional to
1/AMCLK
260
k
GAIN = 1x, proportional to
1/AMCLK
150
k
GAIN = 2x, proportional to
1/AMCLK
—80
k
GAIN = 4x, proportional to
1/AMCLK
—40
k
GAIN = 8x, proportional to
1/AMCLK
—20
k
GAIN ≥ 16x, proportional to
1/AMCLK
Analog Input Leakage
Current During ADC
Shutdown
ILI_A
—±10
nA
Internal Voltage Reference
Internal VREF Absolute Voltage
IVREF
-2%
2.4
+2%
V
VREF_SEL = 1,
TA = +25°C only
Internal VREF Temperature
Coefficient
TCREFE
15
40
ppm/°C TA = -40°C to +125°C,
extended temperature range
(Note 2)
Internal VREF
Temperature Coefficient
TCREFI
9
40
ppm/°C TA = -40°C to +85°C,
industrial temperature range
(Note 2)
Voltage Reference Buffer
Short-Circuit Current
IREF_SC
8
mA
REFIN+/OUT shorted to AGND,
VREF_SEL = 1 (Note 9)
Internal Reference
Settling Time
tVREF_SET
12
ms
Settling to 10 ppm from final
value, bypass capacitor 1 µF
(Notes 2, 11)
Internal VREF Output Noise
VREF_Noise
14.3
µV
VREF_SEL = 1, AZ_VREF = 1
(chopper on), TA = +25°C only
(Note 2)
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = 2.7V to 3.6V, DVDD = 1.8V to AVDD +0.1V,
MCLK = 4.9152 MHz, VREF =AVDD, ADC_MODE[1:0] = 11. All other register map bits to their default conditions,
TA = -40°C to +125°C, VIN = -0.5 dBFS at 50 Hz.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Note 1:
This parameter is ensured by design and not 100% tested.
2:
This parameter is ensured by characterization and not 100% tested.
3:
REFIN- must be connected to ground for single-ended measurements.
4:
Full-Scale Range (FSR) = 2 x VREF/Gain.
5:
This input impedance is due to the internal input sampling capacitor and frequency. This impedance is measured between
the two input pins of the channel selected with the input multiplexer.
6:
Applies to all analog gains. Offset and gain errors depend on analog gain settings. See Section 2.0 “Typical
Performance Curves”.
7:
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
8:
DIDD is measured while no transfer is present on the SPI bus.
9:
An external buffer is recommended for external use.
10: Start-up time is the reaction time to the SPI command.
11: Settling time depends on bypass caps on REFIN+/OUT pin.



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