MCP3461RT-ESLASHST datasheet(64/118 Pages) MICROCHIP

64 / 118 page

MCP3461/2/4R

DS20006404C-page 64

 2020-2021 Microchip Technology Inc.

5.15.5

DELAY BETWEEN SCAN CYCLES

(TIMER[23:0])

During Continuous mode, Scan cycles are processed

continuously, one after another, separated by a time

delay (TTIMER_SCAN), which is defined by the TIMER

ADC is automatically placed into a power-saving mode

(Standby or ADC Shutdown). The TTIMER_SCAN delay

offers better power efficiency for applications which run

a scan sequence periodically. Since the delay can be

very long, it allows synchronous applications with very

slow update rates without having to use an external

timer. The TIMER

defines

the

time,

TTIMER_SCAN, between cycles with a 24-bit unsigned

value going from 0 to 16777215 DMCLK periods.

Table 5-17 details the TIMER values with respect to the

TIMER[23:0] code.

The internal TIMER counter will decrement from the

TTIMER_SCAN value to 0 and launch the new Scan cycle.

If the TTIMER_SCAN value is greater than TADC_SETUP

(256 DMCLK periods), the device will enter ADC

Shutdown mode (ADC_MODE is set to ‘00’ internally)

at each end of a Scan cycle. When the internal TIMER

counter reaches 256, the device will start the ADC

during a TADC_SETUP time to be ready to convert when

the internal counter reaches 0.

If the TTIMER_SCAN value is less than TADC_SETUP, the

part will be placed in Standby mode between Scan

cycles (ADC_MODE is set to ‘10’ internally).

ADC_MODE[1:0] bits in the CONFIG0 register can only

be read as ‘11’ by the SPI interface during the entire

Scan cycle and between Scan cycles.

5.16

A/D Conversion Automatic Reset

and Restart Feature

When the A/D conversions are running, the user can

change the device configuration through the SPI inter-

face by writing any register. Some register settings

directly impact the conversion results and lead to

invalid ADC data if they are changed within a

conversion.

The device incorporates an automatic Reset and

Restart feature for the A/D conversions to avoid these

invalid data. Some register writes with the SPI interface

during a conversion will automatically reset and restart

the A/D conversion with the new settings.

The automatic Reset and Restart feature behavior

depends on the register bits that are written by the SPI

interface.

5.16.1

NOT CAUSING RESET/RESTART

The first group of bits will not generate any Reset and

Restart. This group is composed of all the unused bits,

all the read-only bits and some digital settings, such

as the CONV_MODE[1:0], DATA_FORMAT[1:0],

CRC_FORMAT,

EN_CRCCOM,

IRQ_MODE[0],

EN_FASTCMD, EN_STP and LOCK[7:0] bits.

5.16.2

CAUSING IMMEDIATE

RESET/RESTART

The second group of bits generates a Reset and a

Restart. The Reset is immediate, the Restart is only

valid after a period of two MCLK periods (necessary to

handle the Reset and ensures that the Restart is

synchronous with the master clock). This group is

composed of settings that do not induce an analog

operating

point

change. This

group

includes:

ADC_MODE[1:0], PRE[1:0], OSR[3:0], GAIN[2:0],

AZ_MUX, EN_OFFCAL, EN_GAINCAL, IRQ_MODE[1:0],

MUX[7:0] and DLY[2:0] bits. The EN_OFFCAL,

EN_GAINCAL and IRQ_MODE[1:0] bits generate the

Reset and Restart only if they are changed to a new

value. An overwrite of the same value has no effect. In

Scan mode, the Reset and Restart feature will just

restart the current conversion for this group of bits; the

Scan cycle is not modified and not restarted. The

MUX[7:0] bits can be changed within Scan mode

without generating a Reset and a Restart, since this reg-

ister is a Don’t Care during Scan mode. The DLY[2:0] bits

can be changed during the MUX mode without generat-

ing a Reset and Restart since these bits are Don’t Care

during the MUX mode. The OFFSETCAL[23:0] and

GAINCAL[23:0] bits only generate a Reset and a Restart

when written if their corresponding enable bit

(EN_OFFCAL, EN_GAINCAL) is enabled.

The ADC_MODE[1:0] bits generate an immediate

Reset and Restart, but only if they are overwritten with

‘11’ (in any other case, the conversions are stopped).

Depending on the part being in MUX or Scan mode,

the Reset and Restart feature will reset the conversion

or the complete Scan cycle.

TABLE 5-17:

TIMER DELAY VALUE

BETWEEN SCAN CYCLES

TIMER[23:0]

TTIMER_SCAN Delay

Value

(DMCLK Periods)

111111111111111111111111

16777215

111111111111111111111110

16777214

100000000000000000000000

8388608

000000000000000000000001

000000000000000000000000

MCP3461RT-E/ST датащи(PDF) 64 Page - Microchip Technology

MCP3461RT-E/ST датащи(HTML) 64 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL