FUSB308B

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34

Table 24. TCPC_CTRL

Address: 19h

Reset Value: 0x00 (POR, and SW_RST)

Type: Read/Write

Bit #

Name

R/W/C

Size (Bits)

TCPC Control Register

7:4

Reserved

R

2

Reserved: 00b

5

EN_WATCHDOG

R/W

1

0b: Watchdog Monitoring is disabled (default)

1b: Watchdog Monitoring is enabled

4

Reserved

R/W

1

Reserved: 0b

3:2

I2C_CLK_STRETCH

R

2

00b: I2C clock stretching is disabled. Writing to these register

bits will be ignored.

1

BIST_TMODE

R/W

1

BIST Test Data Receive Enable

0b: Normal Operation. Incoming messages are stored and

passed to host

1b: BIST Test Mode. Receive buffer is cleared immediately after

GoodCRC response.

0

ORIENT

R/W

1

Plug Orientation

0b: When Vconn is enabled, apply it to the CC2 pin. Monitor the

CC1 pin for BMC communications if PD messaging is enabled.

1b: When Vconn is enabled, apply it to the CC1 pin. Monitor the CC2

pin for BMC communications if PD messaging is enabled.

Table 25. ROLECTRL

Address: 1Ah

Reset Value (Note 19) 0x0F for FUSB308 without VDD and 0x05 with VDD

Type: Read/Write

Bit #

Name

R/W/C

Size (Bits)

Role Control Description

7

Reserved

R

1

Reserved: 0b

6

DRP

(Note 19, 20)

R/W

1

0b: No DRP. Bits B3..0 determine Rp/Rd/Ra settings

1b: DRP

5:4

RP_VAL

R/W

2

00b: Rp default

01b: Rp 1.5 A

10b: Rp 3.0 A

11b: Reserved

3:2

CC2_TERM

(Note 21, 22)

R/W

2

00b: Ra

01b: Rp (Use Rp definition in B5..4)

10b: Rd

11b: Open (Disconnect or don’t care)

1:0

CC1_TERM

(Note 21, 22)

R/W

2

00b: Ra

01b: Rp (Use Rp definition in B5..4)

10b: Rd

11b: Open (Disconnect or don’t care)

18.Reset values are loaded on either VBUS or VDD power up.

19.Rp value is defined in B5..4 when performing the DRP toggling as well as when a connection is resolved.

20.The FUSB308B toggles CC1 & CC2 after receiving a.LOOK4CON and until a connection is detected. Upon connection, the FUSB308B

resolves to either an Rp or Rd and report the CC1/CC2 State in the CCSTAT register. The FUSB308B will continue to present the resolved

Rd or Rp regardless of any changes voltage on the CC wires.

21.When CCx_TERM bits are set to Open and DRP = 0, the PHY and CC comparators will power down.

22.If DRP = 1,.LOOK4CON starts toggling with the value set in CC1_TERM/CC2_TERM. If CC1_TERM/CC2_TERM is different than Rp/Rp

or Rd/Rd, the COMMAND will be ignored.