FUSB308B datasheet(7/53 Pages) ONSEMI

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FUSB308B

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I2C Idle Mode

Entering I2C Idle Mode

The FUSB308B does not need to enter I2C Idle Mode in

order to save power. Entering this mode has no effect on I2C

function. The FUSB308B can enter idle mode if 0xFF is

written to the COMMAND register. Once in Idle mode, the

FUSB308B will not set the PWRSTAT.TCPC_INIT to one.

Exiting I2C Idle Mode

The FUSB308B will exit I2C Idle mode when any I2C

communication is addressed to the slave. The

ALERTL.I_PRT_PWR interrupt will be set and no

PWRSTAT bits will be set.

The device’s I2C block is always on without power

penalties.

VCONN Control

The FUSB308B integrates a CCx to VCONN switch with

programmable OCP capability via the VCONN_OCP

standard VCONN current limit is used (210.5 mA). If

PWRCTRL.VCONN_PWR is set to 1, the programmable

VCONN_OCP is used.

The VCONN switch can be enabled via the PWRCTRL

(for CC1/2 selection).

A VCONN valid voltage is monitored and reported on

PWRSTAT.VCONN_VAL. The valid voltage threshold is

fixed at 2.4 V.

Type−C Manual Mode Detection

The CC pull up (Rp) or pull down (Rd) resistors and DRP

toggle are setup via the ROLECTRL register.If a TCPM

wishes to control Rp/Rd directly, it can write

ROLECTRL.DRP = 0b and the desired ROLECTRL bits

[3:0] (CC1/CC2).

The FUSB308B can autonomously toggle the Rp/Rd by

setting ROLECTRL.DRP = 1b and the starting value of

Rp/Rd in ROLECTRL.bits [3:0]. DRP toggling starts by

writing to the COMMAND register

If ROLECTRL.DRP = 1b, the only allowed values for

CC1/CC2 in ROLECTRL bits [3:0] are Rp/Rp or Rd/Rd.

When ROLECTRL bits 3:0 are set to Open and

ROLECTRL.DRP = 0b, the PHY and CC comparators are

powered down.

The FUSB308B updates the CCSTAT register on a

Connect, Disconnect, a change in ROLECTRL.DRP or a

change (tTCPCFilter debounced) on the CC1 or CC2 wire.

The TCPM reads CCSTAT upon detecting an interrupt

and seeing the ALERTL.I_CCSTAT = 1. The FUSB308B

indicates the DRP status, the DRP result, and the current CC

status in this register.

The FUSB308B will set CCSTAT.LOOK4CON = 0b

when it has stopped toggling as a DRP.

The TCPM reads the CCSTAT.LOOK4CON to determine

if the FUSB308B is toggling Rp/Rd when operating as a

DRP, it then reads CCSTAT.CON_RES to determine if the

FUSB308B is presenting an Rp or Rd and read the

CCSTAT.CC1_STAT

and

CCSTAT.CC2_STAT

determine the CC1 and CC2 states.

The FUSB308B debounces the CC lines for tTCPCfilter

before reporting the status on CCSTAT. The TCPM must

complete the debounce as defined in Type−C Specification.

BMC Power Delivery

The Type−C connector allows USB Power Delivery (PD)

to be communicated over the connected CC pin between two

ports. The communication method is the BMC Power

Delivery protocol and is used for many different reasons

with the Type−C connector. Possible uses are outlined

below.

• Negotiating and controlling charging power levels

• Alternative Interfaces such as MHL, Display Port

• Vendor specific interfaces for use with custom docks or

accessories

• Role swap for dual−role ports that want to switch who

is the host or device

• Communication with USB3.1 full featured cables

The FUSB308B integrates a thin BMC PD client which

includes the BMC physical layer and packet buffers which

allows packets to be sent and received by the host software

through I2C accesses.

Receive State Machine

The TCPM can setup the desired types of messages to be

received by the FUSB308B via the RXDETECT register.

This register defaults to 0x00 (Receiver disabled) upon

power up, reset, Hard Reset transmission and reception, and

upon detecting a cable disconnect. A message is not received

unless it is first enabled. Figure 6 shows the FUSB308B

receive state machine.

Upon a successfully transmitting GoodCRC, the

RXSTAT register is updated with the type of message

received and the TCPM is alerted via ALERTL.I_RXSTAT

bit (see transition from PRL_Rx_Send_GoodCRC to

PRL_Rx_Report_SOP* in Figure 6). The total number of

bytes in the receive buffer RXDATA is stored in

RXBYTECNT This number includes the header bytes that

are stored in RXHEADL and RXHEADH and the RXSTAT

The RXBYTECNT, RXSTAT registers and the internal

receive buffer will be cleared after the ALERTL.I_RXSTAT

bit is cleared.

The FUSB308B will automatically transmit a GoodCRC

message for valid enabled messages within tTransmit.

A received message is valid when:

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