USB333X datasheet(28/85 Pages) MICROCHIP

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USB333x

DS00001880A-page 28

 2009 - 2015 Microchip Technology Inc.

5.4.1.2

ULPI Clock Input Mode (60MHz REFCLK Mode)

When using ULPI Clock Input Mode, the Link must supply the 60MHz ULPI clock to the USB333x. In this mode the

60MHz ULPI Clock is connected to the REFCLK pin, and the CLKOUT pin is tied high to VDD18 (USB3330, USB3331,

USB3336, and USB3338) or VDDIO (USB3333). An example of ULPI Clock In Mode is shown in Figure 8-2.

After the PLL has locked to the correct frequency, the USB333x will de-assert DIR and the Link can begin using the

ULPI interface. The USB333x is set to start the clock within the time specified in Table 4-3. For Host applications, the

ULPI AutoResume bit should be enabled. This is described in Section 6.4.1.4.

For the USB3330 and USB3333, the REF pin(s) should be tied to ground.

5.4.2

REFCLK AMPLITUDE

The reference clock should be connected to the REFCLK pin as shown in the application diagrams, Figure 8-1 and

Figure 8-2. The REFCLK pin is designed to be driven with a square wave from 0V to VDD18, but can be driven with a

square wave from 0V to as high as 3.6V. The USB333x uses only the positive edge of the REFCLK.

If a digital reference is not available, the REFCLK pin can be driven by an analog sine wave that is AC coupled into the

REFCLK

pin. If using an analog clock the DC bias should be set at the mid-point of the VDDIO supply or the VDD18

regulator output. Use a bias circuit as shown in Figure 5-6. The amplitude must be greater than 300mV peak to peak.

The component values provided in Figure 5-6 are for example only. The actual values should be selected to satisfy sys-

tem requirements.

The REFCLK amplitude must comply with the signal amplitudes shown in Table 4-5 and the duty cycle in Table 4-3.

FIGURE 5-5:

CONFIGURING THE USB333X FOR ULPI CLOCK INPUT MODE

FIGURE 5-6:

EXAMPLE OF CIRCUIT USED TO SHIFT A REFERENCE CLOCK COMMON-

MODE VOLTAGE LEVEL.

CLKOUT

REFCLK

PHY

Clock

Source

To PLL

Link

ULPI Clk Out

Reference Clk In

VDD18/

VDDIO

Clock

0.1uF

VDDIO Supply or VDD18

To REFCLK pin

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