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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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XRT75VL00D датащи(PDF) 36 Page - Exar Corporation |
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XRT75VL00D датащи(HTML) 36 Page - Exar Corporation |
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36 / 92 page  XRT75VL00D E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER REV. 1.0.3 31 As defined in ITU-T G.775, an LOS condition is also declared between 10 and 255 UI (or E3 bit periods) after the actual time the LOS condition has occurred. The LOS condition is cleared within 10 to 255 UI after restoration of the incoming line signal. Figure 20 shows the LOS declaration and clearance conditions. 5.4.3 Muting the Recovered Data with LOS condition: When the LOS condition is declared, the clock recovery circuit locks into the reference clock applied to the ExClk pin and output this clock on the RxClk output. The data on the RPOS and RNEG pins can be forced to zero by pulling the LOSMUT pin “High” (in Hardware Mode) or by setting the LOSMUT bits in the individual channel control register to “1” (in Host Mode). NOTE: When the LOS condition is cleared, the recovered data is output on RPOS and RNEG pins. FIGURE 20. LOSS OF SIGNAL DEFINITION FOR E3 AS PER ITU-T G.775. Actual Occurrence of LOS Condition Line Signal is Restored Time Range for LOS Declaration Time Range for LOS Clearance G.775 Compliance G.775 Compliance 0 UI 10 UI 0 UI 10 UI 255 UI 255 UI RTIP/ RRing RLOS Output Pin |
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