XRT75VL00D datasheet(11/92 Pages) EXAR

11 / 92 page

XRT75VL00D

REV. 1.0.3

E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

RECEIVE INTERFACE

PIN #SIGNAL NAME

TYPE

DESCRIPTION

RxON/

SDI

Receiver Turn ON Input or Serial Data Input:

Function of this pin depends on whether the XRT75VL00D is configured to

operate in Hardware mode or Host mode.

In Hardware mode, setting this input pin “High” turns on and enables the

Receiver..

NOTES:

If the XRT75VL00D is configured in HOST mode, this pin functions as

SDI input pin (please refer to the pin description for Microprocessor

Interface)

This pin is internally pulled down.

REQEN

Receive Equalization Enable Input

Setting this input pin "High" enables the Internal Receive Equalizer. Setting this

pin "Low" disables the Internal Receive Equalizer.

NOTES:

This input pin is ignored and may be connected to GND if the

XRT75VL00D is operating in the HOST Mode

This pin is internally pulled down.

RxClk

Receive Clock Output

The Recovered Clock signal from the incoming line signal is output through this

pin.By default, the Receiver Section outputs data via RPOS and RNEG pins on

the rising edge of this clock signal.

Configure the Receiver Section to update data on the RPOS and RNEG pins on

the falling edge of RxClk by doing the following:

a) Operating in Hardware mode, pull the RxClkINV pin to “High”.

b) Operating in Host mode, write a “1” to RxClkINV bit field within the Receive

Control Register.

RxClkINV/

RxClk INVERT or Chip Select:

Function of this pin depends on whether the XRT75VL00D is configured to

operate in Hardware mode or Host mode.

In Hardware mode, setting this input pin “High” configures the Receiver Sec-

tion

to invert the RxClk output signals and outputs the recovered data via

RPOS and RNEG on the falling edge of RxClk.

NOTE: If the XRT75VL00D is configured in HOST mode, this pin functions as

CS input pin (please refer to the pin description for Microprocessor

Interface).

RPOS

Receive Positive Data Output

This output pin pulses “High" whenever the XRT75VL00D has received a Posi-

tive Polarity pulse in the incoming line signal at the RTIP/RRing inputs.

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