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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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XRT75VL00D датащи(PDF) 13 Page - Exar Corporation |
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XRT75VL00D датащи(HTML) 13 Page - Exar Corporation |
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13 / 92 page  XRT75VL00D REV. 1.0.3 E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER 8 CLOCK INTERFACE PIN #SIGNAL NAME TYPE DESCRIPTION 44 ExClk/12M I Clock Input (34.368 MHz or 44.736 MHz or 51.84 MHz ± 20 ppm): Based on the mode selected, provide the appropriate reference clock signal. If the XRT75VL00D is configured for Single Frequency Mode with the SFM_EN tied “High”, then provide a 12.288 MHz ± 20 ppm clock and depending on the mode, the correct frequency is generated internally by the clock synthesizer.. 9SFM_EN I Single Frequency Enable: Tie this pin “High” to select the single frequency mode. When enabled, a single frequency clock, 12.288 MHz is input through the ExClk input pin and the inter- nal clock synthesizer generates the appropriate clock frequency. NOTE: This pin is internally pulled down. 39 CLK_OUT O Clock out put: When the Single Frequency Mode is selected, a low jitter clock will be out put. The frequency of this clock depends on whether the XRT75VL00D is configured in E3 or DS3 or STS-1 mode. |
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