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IP4856CX25/C датащи(PDF) 14 Page - Nexperia B.V. All rights reserved |
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IP4856CX25/C датащи(HTML) 14 Page - Nexperia B.V. All rights reserved |
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14 / 22 page ![]() IP4856CX25_C All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 2 — 15 October 2014 13 of 21 NXP Semiconductors IP4856CX25/C SD 3.0-compliant memory card integrated dual voltage level translator 12.3 ESD characteristic of pin write protect and card detect [1] TLP according to ANSI-ESD STM5.5.1/IEC 62615 Zo =50 ; pulse width = 100 ns; rise time = 200 ps; averaging window = 50 ns to 80 ns. Fig 7. Output delay timing Table 13. ESD characteristic of write protect and card detect At recommended operating conditions; Tamb =25 C; voltages are referenced to GND (ground = 0 V); unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ESD protection pins: WP and CD VBR breakdown voltage TLP; I = 1 mA - 8 - V rdyn dynamic resistance positive transient [1] -0.5 - negative transient [1] -0.5 - |
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