IP4856CX25_C

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Product data sheet

Rev. 2 — 15 October 2014

10 of 21

NXP Semiconductors

IP4856CX25/C

SD 3.0-compliant memory card integrated dual voltage level translator

[1]

[2]

Guaranteed by design and characterization.

[3]

Host-side output signals: CLK_FB, CMD_H and DATA0_H to DATA3_H

HIGH-level output

voltage

0.85



-V

LOW-level output

voltage

-

-

0.125



V

Card-side input signals: CMD_SD and DATA0_SD to DATA3_SD

HIGH-level input

voltage

SEL = LOW (2.9 V interface)

0.625



0.3

V

SEL = HIGH (1.8 V interface)

0.625



0.3

V

LOW-level input

voltage

SEL = LOW (2.9 V interface)

0.3

-

0.35



V

SEL = HIGH (1.8 V interface)

0.3

-

0.35



V

Card-side output signal

CMD_SD, DATA0_SD to DATA3_SD and CLK_SD

HIGH-level output

voltage

(2.9 V interface)

0.85



0.3

V

(1.8 V interface)

0.85



-2.0

V

LOW-level output

voltage

(2.9 V interface)

0.3

-

0.125



V

(1.8 V interface)

0.3

-

0.125



V

Bus signal equivalent capacitance

channel capacitance

[3]

host side

-

3.5

5.0

pF

card side

-

5.0

10.0

pF

Current consumption

static supply current

ENABLE = HIGH (active mode);

all inputs = HIGH; DIR = LOW

SEL = LOW (2.9 V interface)

-

-

100

A

SEL = HIGH (1.8 V interface)

-

-

100

A

standby supply

current

ENABLE = LOW (inactive mode)

-

-

1

A

Table 10.

Symbol Parameter

Conditions

Min

Max

Unit