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STLC1510 датащи(PDF) 19 Page - STMicroelectronics

номер детали STLC1510
подробное описание детали  NorthenLite G.lite DMT Transceiver
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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STLC1510 датащи(HTML) 19 Page - STMicroelectronics

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STLC1510
Table 4. HPI Memory Map
5.8 Block Processing Unit (BPU) Functional
Description
5.8.1 Block Processing Unit - Core
The BPU is a programmable Digital Signal Processor
responsible for the bulk of the high rate signal pro-
cessing required in the modem. This processor utiliz-
es a dual multiply accumulate Arithmetic Unit (AU)
and Very Long Instruction Word (VLIW) format to
achieve high processing efficiencies.
The BPU is designed to perform the following func-
tions:
s
Finite Impulse Filters (FIR)
s
(Infinite Impulse Response) IIR
s
FFT/IFFT
s
Compression/decompression for FFT/IFFT
s
FDEQ
s
Tx Gain
s
SNR calculation - recursive average
s
add/remove cyclic prefix
s
Slicer
s
Auto Correlation
s
FDEQ update
s
Digital AGC
HPI Reg
Host
Processor
Addr
BIN
Output Status Reg
000
Output Index Reg
001
Output Mask Reg
010
Input Status Reg
011
Input Index Reg
100
Input Mask Reg
101
Output Message Buffer
110
Input Message Buffer
111
Figure 6. BPU Core Block Diagram
PROGRAM
MEMORY
ADDRESS
PROGRAM
MEMORY
DATA
ADDRESS CALCULATION UNIT (ACU)
PROGRAM CONTROL UNIT (PCU)
PROGRAM MEMORY
XDATA MEM
CDATA MEM
AU CONTROL
MCU/DFE
DATA
MEMORY
INTERFACE
XPORT
CPORT
(XDM)(CDM)
ARITHMETIC UNIT (AU)
AU CONTROL



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