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AD9174 датащи(PDF) 9 Page - Analog Devices

номер детали AD9174
подробное описание детали  Dual, 16-Bit, 12.6 GSPS RF DAC and Direct Digital Synthesizer
PDF  164 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9174 датащи(HTML) 9 Page - Analog Devices

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Data Sheet
AD9174
Rev. A | Page 9 of 164
SERIAL PORT AND CMOS PIN SPECIFICATIONS
AVDD1.0 = 1.0 V, AVDD1.8 = 1.8 V, DVDD1.0 = 1.0 V, DVDD1.8 = 1.8 V, SVDD1.0 = 1.0 V, and DAC output full-scale current (IOUTFS) =
20 mA, unless otherwise noted. For the minimum and maximum values, TJ = −40°C to +118°C. For the typical values, TA = 25°C, which
corresponds to TJ = 51°C.
Table 5.
Parameter
Symbol
Test Comments/Conditions
Min
Typ
Max
Unit
WRITE OPERATION
See Figure 51
Maximum SCLK Clock Rate
fSCLK, 1/tSCLK
80
MHz
SCLK Clock High
tPWH
SCLK = 20 MHz
5.03
ns
SCLK Clock Low
tPWL
SCLK = 20 MHz
1.6
ns
SDIO to SCLK Setup Time
tDS
1.154
ns
SCLK to SDIO Hold Time
tDH
0.577
ns
CS to SCLK Setup Time
tS
1.036
ns
SCLK to CS Hold Time
tH
−5.3
ps
READ OPERATION
See Figure 50
SCLK Clock Rate
fSCLK, 1/tSCLK
48.58
MHz
SCLK Clock High
tPWH
5.03
ns
SCLK Clock Low
tPWL
1.6
ns
SDIO to SCLK Setup Time
tDS
1.158
ns
SCLK to SDIO Hold Time
tDH
0.537
ns
CS to SCLK Setup Time
tS
1.036
ns
SCLK to SDIO Data Valid Time
tDV
9.6
ns
SCLK to SDO Data Valid Time
tDV
13.7
ns
CS to SDIO Output Valid to High-Z
Not shown in Figure 50 or
Figure 51
5.4
ns
CS to SDO Output Valid to High-Z
Not shown in Figure 50 or
Figure 51
9.59
ns
INPUTS (SDIO, SCLK, CS, RESET, TXEN0, and TXEN1)
Voltage Input
High
VIH
1.48
V
Low
VIL
0.425
V
Current Input
High
IIH
±100
nA
Low
IIL
±100
nA
OUTPUTS (SDIO, SDO)
Voltage Output
High
VOH
0 mA load
1.69
V
4 mA load
1.52
V
Low
VOL
0 mA load
0.045
V
4 mA load
0.175
V
Current Output
High
IOH
4
mA
Low
IOL
4
mA
INTERRUPT OUTPUTS (IRQ0, IRQ1)
Voltage Output
High
VOH
1.71
V
Low
VOL
0.075
V



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