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AD9174 датащи(PDF) 71 Page - Analog Devices

номер детали AD9174
подробное описание детали  Dual, 16-Bit, 12.6 GSPS RF DAC and Direct Digital Synthesizer
PDF  164 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

AD9174 датащи(HTML) 71 Page - Analog Devices

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Data Sheet
AD9174
Rev. A | Page 71 of 164
As previously mentioned, MSB shuffling is a form of error
averaging. A particular AD9174 device, with its own auto-
calibration factors and unique production process variations,
may show improved spurious performance at some signal levels
with MSB shuffle disabled. However, when a statically meaningful
set of devices is considered, the overall spurious performance is
shown to improve, on average.
MSB shuffle can be enabled via the MSB_SHUFFLE_EN bit (Bit 4
of Register 0x151).
DC-Coupled Operation
In certain applications, it is desirable to dc couple the analog
outputs to an external device, such as a modulator or a
differential amplifier. The AD9174 analog outputs can be
dc-coupled without performance degradation, as long as the
common-mode voltage (the dc voltage common to both the
positive and negative branches of a particular analog output) is
kept below 100 mV. For ac-coupled operation, the outputs are
typically dc shorted to GND or 0 V through RF chokes or
particular balun configurations.
Elevating the common-mode voltage to between 100 mV and
300 mV leads to performance degradation. Increasing the
common-mode voltage beyond 300 mV may lead to long-
term, irreversible damage of the analog outputs.
Ideally, the common-mode voltage at the analog outputs is kept
near 0 V or GND, while the load impedance seen by the analog
outputs is matched to their internal impedance. Replacing the
RF chokes used in ac-coupled operation with 50 Ω resistors to
GND is not recommended because this results in an excessive
common-mode voltage, near 250 mV. Instead, tie the 50 Ω resistors
to a −0.6 V reference supply, thus maintaining proper dc bias at the
analog output devices internal to each DAC output.
It is possible to resistively match the 0 V common-mode output
voltage of the AD9174 to a nonzero common-mode input voltage
of a downstream device, such as the 0.5 V input common mode
typical to some modulators. This matching inevitably leads to a
loss in the maximum power that can be delivered to the down-
stream device, because some of the power is dissipated in the
resistive matching network.
2:1
OR
1:1
50Ω
LOAD
50Ω
50Ω
DC IOUTFS/2
DC IOUTFS/2
AC IOUTFS/2
DAC
BALUN
RF
CHOKE
RF
CHOKE
DACx+
DACx–
IAC
IOUTFS = 15.625mA TO 25.977mA
IN
IP
Figure 91. Equivalent DAC Output Circuit and Recommended DAC Output Network
2:1
OR
1:1
50Ω
LOAD
50Ω
50Ω
DC IOUTFS/2
DC IOUTFS/2
AC IOUTFS/2
DAC
BALUN
RF
CHOKE
RF
CHOKE
DACx+
DC PATH
DC PATH
DACx–
IAC
IOUTFS = 15.625mA TO 25.977mA
IN
IP
Figure 92. DACx Output, DC Path (AC-Coupled Operation)
50Ω
LOAD
2:1
OR
1:1
50Ω
50Ω
DC IOUTFS/2
DC IOUTFS/2
AC IOUTFS/2
DAC
BALUN
RF
CHOKE
RF
CHOKE
DACx+
AC ILOAD
AC ILOAD
DACx–
AC PATH
AC PATH
IOUTFS = 15.625mA TO 25.977mA
IN
IP
Figure 93. DACx Output, AC Path (AC-Coupled Operation)



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