TPS65982ABZBHR datasheet(52/121 Pages) TI1

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-0.5

-1

0.5

1.5

2.5

D011

I CC2

C_CC2

PP_CABLE

TPS65982

SLVSD02D – MARCH 2015 – REVISED JUNE 2019

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Product Folder Links: TPS65982

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Figure 42. PP_CABLE to C_CCn Current Limit Response with a Soft Short (2 Ω)

9.3.4 USB Type-C Port Data Multiplexer

The USB Type-C receptacle pin configuration is show in Figure 43. Not all signals shown are required for all

platforms or devices. The basic functionality of the pins deliver USB 2.0 (D+ and D–) and USB 3.1 (TX and RX

pairs) data buses, USB power (VBUS) and ground (GND). Configuration Channel signals (CC1 and CC2), and

two Reserved for Future Use (SBU) signal pins. The data bus pins (Top and Bottom D+/D– and the SBU pins)

are available to be used in non-USB applications as an Alternate Mode (i.e., DisplayPort, Thunderbolt™, etc.).

A11

A12

GND

TX1+

TX1–

VBUS

CC1

D+

D–

SBU1

VBUS

RX2–

RX2+

GND

RX1+

RX1–

VBUS

SBU2

D–

D+

CC2

VBUS

TX2–

TX2+

GND

B12

B11

B10

Figure 43. USB Type-C Receptacle Pin Configuration

The TPS65982 USB Type-C interface multiplexers are shown in Table 2. The outputs are determined based on

detected cable orientation as well as the identified interface that is connected to the port. There are two USB

output ports that may or may not be passing USB data. When an Alternate Mode is connected, these same ports

may also pass that data (e.g. DisplayPort, Thunderbolt). Note, the TPS65982 pin to receptacle mapping is shown

in Table 2. The high-speed RX and TX pairs are not mapped through the TPS65982 as this would place extra

resistance and stubs on the high-speed lines and degrade signal performance.

Table 2. TPS65982 to USB Type-C Receptacle Mapping

DEVICE PIN

Type-C RECEPTACLE PIN

VBUS

VBUS (A4, A9, B4, B9)

C_CC1

CC1 (A5)

C_CC2

CC2 (B5)

C_USB_TP

D+ (A6)

C_USB_TN

D– (A7)

C_USB_BP

D+ (B6)

C_USB_BN

D– (B7)

C_SBU1

SBU1 (A8)

C_SBU2

SBU2 (B8)

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