PCF8813 datasheet(55/72 Pages) PHILIPS

55 / 72 page

2004 Mar 05

Philips Semiconductors

Product speciﬁcation

(67 + 1)

× 102 pixels matrix LCD driver

PCF8813

17.8

Programming speciﬁcation

Table 24 Programming parameters

Notes

1. The voltage drop across the ITO track and zebra connector must be taken into account to guarantee sufficient

voltage at the chip pads.

2. The high voltage generator must be disabled (VPR = 0 and PRS = 0) when pad VLCDIN is being driven.

SYMBOL

PARAMETER

CONDITION

MIN.

TYP.

MAX.

UNIT

VDD1

logic supply voltage

2.4

−

3.3

VOTPPROG voltage applied to pad VOTPPROG

VOTPPROG relative to VSS1; note 1

programming active

11.0

11.5

12.0

programming inactive

−

VDD1

VLCDIN

voltage applied to pad VLCDIN

VLCDIN relative to VSS1; notes 1, 2

programming active

9.0

9.50

10.5

programming inactive

−

VDD2

IOTPPROG

current drawn during programming

−

100

200

µA

ILCDIN

current drawn during programming

when programming one bit to logic 1

−

850

1000

µA

Tprog

ambient temperature during

programming

025

°C

tsu(INTCLK) internal data set-up time after last

clock

−−µs

thd(INTCLK) internal data hold time before next

clock

−−µs

tsu(gate)

VOTPPROG set-up time prior to

programming

−

thd(gate)

VOTPPROG hold time after

programming

−

tPW

programming voltage pulse width

100

120

200

handbook, full pagewidth

INT_CLK

tsu(INTCLK)

tsu(gate)

thd(gate)

thd(INTCLK)

tPW

MGU646

VVOTPPROG

VLCDIN

Fig.50 Programming waveforms.

PCF8813 датащи(PDF) 55 Page - NXP Semiconductors

PCF8813 датащи(HTML) 55 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

датащи скачать

ссылки URL