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PCF8813 датащи(PDF) 53 Page - NXP Semiconductors |
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PCF8813 датащи(HTML) 53 Page - NXP Semiconductors |
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53 / 72 page ![]() 2004 Mar 05 53 Philips Semiconductors Product specification (67 + 1) × 102 pixels matrix LCD driver PCF8813 Table 22 Example sequence of shift register filling Notes 1. X = don’t care. 2. PD does not have to be set to 1 if the effects of VCAL are intended to be observed on VLCDOUT. 3. Bit data is not in the correct shift register position until all bits have been sent. STEP D/CR/W D7 D6 D5 D4 D3 D2 D1 D0 ACTION 1 reset reset to enable OTP circuitry 1 0000100000 exit Power-down (PD = 0) 3 000001001 PC switch HVgen on/off to force refresh of shift register wait 5 ms for refresh to take effect 4 0000100101 set PD to 1(2) and H to 1 5 0000011110 enter MM mode 6 0010 XXXXX 1 shift-in data; VCAL[4] is first bit(3) 7 0010 XXXXX 1 VCAL[3] 8 0010 XXXXX 1 VCAL[2] 9 0010 XXXXX 0 VCAL[1] 10 0010 XXXXX 0 VCAL[0] 11 0010 XXXXX 1 MF[2] 12 0010 XXXXX 0 MF[1] 13 0010 XXXXX 0 MF[0] 14 0010 XXXXX 0 seal bit; remain in MM mode handbook, full pagewidth MSB LSB shifting direction 0 MGU645 MMMF[2:0] SEAL BIT = 0 0 1 MSB LSB 0 MMVOPCAL[4:0] OTP SHIFT REGISTER 0 1 1 1 Fig.49 Shift register contents after example sequence of Table 22. |
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