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AXP288D датащи(PDF) 24 Page - Shenzhen X-Powers Technology Co ., Ltd

номер детали AXP288D
подробное описание детали  PMIC Optimized For Multi-Core High-Performance System
PDF  110 Pages
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AXP288
PMIC Optimized For Multi-Core High-Performance System
AXP288 Datasheet V1.06
Copyright © 2014 X-Powers Limited. All Rights Reserved.
24
POK, PMIC timer will start counting the hold time. POK signal has to be low for at least 32ms for it to be considered a valid
signal. If the power on key hold time exceeds the timer threshold (ONLEVEL determined by REG36H [7:6]), the PMIC will
continue to boot as long as the battery voltage is above the battery boot threshold. Otherwise the PMIC will remain off.
Off State
Power Button
Pbutton Timer >
turn on time?
Standby State (S0iX)
Shutdown
PMIC Boots to
standby state
yes
SoC de-asserts
SLP_S0IX_B Pin
Active State (S0)
PMIC completes
boot process asserts
PWRGOOD signals
SoC Boots OS
no
Battery level >
boot threshold?
no
Figure 9-3
Power off from ALDOIN< VOFF
PMIC will constantly monitor voltage level of ALDOIN which is connected to IPSOUT. When VALDOIN < VOFF (default is 2.9V,
set in REG 31H[2:0]), PMIC will force shutdown. There will be 500us de-bounce circuit for ALDOIN detection and adjusted
hysteresis voltage to prevent false trigger. After force shutdown occurred, PMIC will remain off and wait for power on event to
boot up.
VOFF and the compensated hysteresis voltage as below:
Table 9-1
VOFF condition
VX condition ( Hysteresis)
VOFF<=3.0V
0.3V
VOFF = 3.1V
0.2V
VOFF = 3.2V or 3.3V
0.1V
Power off due to faulty condition
PMIC will force shutdown once faulty event happened. Faulty event includes VBUS>7V, PMIC internal temperature
exceeds warning level3 (set in REG 8FH [2]) and buck output drop more than 15% than the targeted output voltage (set in Reg
81H).
Power off by power on key pressed
Once power on key pressed, POK signal assert low and need to remain low for 32ms to be considered valid. PMIC has
configurable timer to detect power on key hold time. If POK remain low for less than IRQLEVEL (set in REG 36H [5:4]), POKSIRQ
will be set. For POK hold time > IRQLEVEL, POKLIRQ will be set. Typically, the system uses POKLIRQ to allow user to express



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