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AXP288D датащи(PDF) 41 Page - Shenzhen X-Powers Technology Co ., Ltd

номер детали AXP288D
подробное описание детали  PMIC Optimized For Multi-Core High-Performance System
PDF  110 Pages
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AXP288D датащи(HTML) 41 Page - Shenzhen X-Powers Technology Co ., Ltd

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AXP288
PMIC Optimized For Multi-Core High-Performance System
AXP288 Datasheet V1.06
Copyright © 2014 X-Powers Limited. All Rights Reserved.
41
BYT Standby entry and exit sequence
Buck2 - V1P0SX
Buck3 - V1P05S/V1P0A/
V1P0S
Buck1 - VCC
VSLEEP
Buck5 - VNN
VSLEEP
SLP_S0IX_B
BYT Standby entrance sequence
Signals from SoC
LDO1 - V1P2SX
T0
T1
0V
0V
0V
Figure 9-15
Table 9-15
Parameter
Description
Min
Typical
Max
Units
T0
SLP_S0IX_B assertion to first SX
rail starts to turn off
0
100
μs
T1
Rail Ramp-down Time from 90%
to 10% voltage level
0.5
1
2.0
ms
T2
Rail to Subsequent Rail Turn-Off
Delay
0.5
1
3.0
ms
BYT Standby exit sequence
Signals from SoC
SLP_S0IX_B
Buck3 - V1P05S/V1P0A/
V1P0S
VSLEEP
VBOOT
0V
LDO1 - V1P2SX
Buck2 - V1P0SX
0V
Buck1 - VCC
0V
Buck5 - VNN
VSLEEP
VBOOT
T0
T1
T2
T3
VBOOT
Figure 9-16



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