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AXP288D датащи(PDF) 84 Page - Shenzhen X-Powers Technology Co ., Ltd

номер детали AXP288D
подробное описание детали  PMIC Optimized For Multi-Core High-Performance System
PDF  110 Pages
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AXP288D датащи(HTML) 84 Page - Shenzhen X-Powers Technology Co ., Ltd

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AXP288
PMIC Optimized For Multi-Core High-Performance System
AXP288 Datasheet V1.06
Copyright © 2014 X-Powers Limited. All Rights Reserved.
84
Reset: System reset
Table 10-52
Bit
Description
R/W
Default
7
Event timer timeout IRQ enable
RW
0
6
POK positive edge IRQ (POKPIRQ) enable
RW
1
5
POK negative edge IRQ (POKNIRQ) enable
RW
1
4
POK short time active IRQ (POKSIRQ) enable
RW
1
3
POK long time active IRQ (POKLIRQ) enable
RW
1
2
POK off time active IRQ (POKOIRQ) enable
RW
1
1
GPIO1 input edge IRQ enable
RW
0
0
GPIO0 input edge IRQ enable
RW
0
REG 45H: IRQ enable 6
Default：00H
Reset: System reset
Table 10-53
REG 48H: IRQ Status 1
Default：00H
Reset: Power on reset
Table 10-54
Bit
Description
R/W
Default
7
Same as bit4, write 1 to it or VBUS drop to normal will clear it
RW
0
6
Same as bit3, write 1 to it or VBUS from high go low will clear it
RW
0
5
Same as bit2, write 1 to it or VBUS from low go high will clear it
RW
0
4
VBUS over voltage IRQ, write 1 to it or VBUS drop to normal will clear it
RW
0
Bit
Description
R/W
Default
7-2
Reserved
1
BC_USB_ChngInEn
BC USB Status Change Interrupt Enable
BC_USB_ChngEvnt Interrupt Enable.
BC Detection result changed or not
RW
0
0
MV_ChngIntEn
Rid MV_ChngEvnt Interrupt Enable.
RW
0



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