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AXP288D датащи(PDF) 75 Page - Shenzhen X-Powers Technology Co ., Ltd

номер детали AXP288D
подробное описание детали  PMIC Optimized For Multi-Core High-Performance System
PDF  110 Pages
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AXP288D датащи(HTML) 75 Page - Shenzhen X-Powers Technology Co ., Ltd

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AXP288
PMIC Optimized For Multi-Core High-Performance System
AXP288 Datasheet V1.06
Copyright © 2014 X-Powers Limited. All Rights Reserved.
75
Run/Stop
Software writes 1 to this bit to start the BC Module operation. A transition from a zero to a
one would cause the reset on the BC Module logic.
If this bit = 1,when VBUS low go high, BC detection start automatically
REG 2DH: BC Module VBUS Control and Status Register
Default：30H
Reset: Power On reset
Table 10-31
Bit
Description
R/W
Default
7
Reserved
R
0
6
Indicate the first power on status
Software write 1 to this bit to indicate not first time power on
If Battery not present, and this bit is 0,the VBUS current limit set to 3A,for the F/W update in
factory
RW
0
5
DP/DM floating Detection enable
0:disable
1:enable
RW
1
4
DP/DM pull down enable
0:disable
1:enable
RW
1
3
RID detect enable
0:disable
1:enable
1,VBUS presence and REG_2C[0]=1,RID was enabled automatically,do not depend on this bit;
2,VBUS presence or in power on state,set this bit to 1 will enable RID detect
RW
0
2-0 Reserved
RW
0
REG 2EH: BC USB Status Register
Default：40H
Reset: Reset by the VBUS negative edge
Table 10-32
Bit
Description
R/W
Default
7
DB_Perform
Dead Battery Perform
Both BC Module and software write 1 to this bit to perform unconfig DBP clause and clean it to 0 to RW
0



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