AD6636BBCZ1 datasheet(49/72 Pages) AD

49 / 72 page

AD6636

Rev. 0 | Page 49 of 72

SPI Mode Write Operation

In SPI mode, the SCLK runs only when data is being trans-

ferred, so no external framing is necessary. The SPI serial mode

supports slave operations only. Input data on SDI pin is

registered on the rising edge of SCLK and, therefore, the DSP or

master device should be set to change data on the falling edge of

SCLK. All input and output transfers take place in 8-bit

transactions.

For a write operation, the user must write two 8-bit instruction

words to the serial port to instruct the AD6636 internal control

logic about the data to be written. The first instruction word is

an address location. If the MSBFIRST pin is Logic 1, this

address is the ending address; if it is Logic 0, this address

corresponds to the starting address. The second instruction

word contains a 1-bit read/write indicator (MSB bit: 1 = read,

0 = write), followed by a 7-bit field to indicate the number of

address locations to write (N).

Following the instruction words are the N write operations

(each one byte long), where N is the number of address

locations to write. After each write cycle, the internal address is

incremented (MSBFIRST = 0) or decremented (MSBFIRST =

1). In this case, MSBFIRST indicates the first bit coming out of

or into the SPI port as well as which byte is written first (most

significant byte of the N-byte transfer).

For example, consider writing Addresses 0x01 to 0x07 of

AD6636 register map, when operating in SPI mode and

MSBFIRST = 0. The instruction words are Addresses 0x01 and

0x07 (MSB = 0 for write). The following seven write cycles

transfer one byte at a time sequentially into Addresses 0x01 to

0x07, in that order. The instruction words and data should be

written with LSB first.

If the example is for MSBFIRST = 1, then the instruction words

are 0x07 (Address 7) and 0x07 (number of addresses to write).

The data corresponds to Addresses 0x07 to 0x01, in that order.

The instruction words and data are MSB first.

SPI Mode Read Operation

Data on the SDO pin is shifted out on the positive edge of

SCLK. Therefore, the DSP or other master device should

transfers take place in 8-bit transactions. The SDO pin is high

impedance when data is not being output.

Each read cycle consists of SCS going low, eight clock cycles

generated on SCLK pin, followed by SCS pulled high. Data

corresponding to the addresses to be read is transferred out on

the SDO pin and is registered by the master device on the

falling edge. The data is MSB first or LSB first based on the

status of MSBFIRST pin.

For example, consider reading Addresses 0x01 to 0x07 of the

AD6636 register map, when operating in SPI mode and

MSBFIRST = 0. The instruction words are Addresses 0x01 and

0x87 (MSB = 1 for read). The following seven read cycles

transfer one byte at a time, sequentially out of Addresses 0x01 to

0x07, in that order. The instruction words should be written

LSB first, and data comes out on the SDO with the LSB first.

If the example is for MSBFIRST = 1, then the instruction words

are 0x07 (Address 7) and 0x87 (MSB = 1 for read, followed by

the number of address locations to read). The data coming out

on SDO corresponds to Addresses 0x07 to 0x01, in that order.

The instruction words are written MSB first, and data comes

out on the SDO with MSB first.

SCLK

SCS

SMODE

SDI

MODE

tSSCS

tHSI

tSSI

tHSCS

LOGIC 1

LOGIC 0

Figure 44. SPI Write to the AD6636 Serial Port and Transfer of 1-Byte Data to Internal Registers

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