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DSP56166ROM датащи(PDF) 56 Page - Motorola, Inc |
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DSP56166ROM датащи(HTML) 56 Page - Motorola, Inc |
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56 / 63 page ![]() PRELIMINARY - 6/15/93 MOTOROLA DSP56166 Technical Data Sheet 46 AC Electrical Characteristics — OnCE Timing VCC = 5.0 Vdc +/- 10%, TJ = -40 ° to +125° C, CL = 50 pF + 1 TTL Load). NOTES: 1. 45%-55% duty cycle 2. Td=DSCK High (183) Num Characteristic 60 MHz Unit Min Max 180 DSCK High to DSO Valid — 27.6 ns 181 DSI Valid to DSCK Low (Setup) 1 — ns 182 DSCK Low to DSI Invalid (Hold) 0.9 — ns 183 DSCK High (See note 1) 2Tc — ns 184 DSCK Low (See note 1) 2Tc — ns 185 DSCK Cycle Time (See note 1) 4Tc — ns 186 CLKO High to OS0-OS1 Valid 14.5 ns 187 CLKO High to OS0-OS1 Invalid — — ns 188 Last DSCK High to OS0-OS1(See note 2) Last DSCK High to ACK Active (data)(See note 2) Last DSCK High to ACK Active (command)(See note 2) 10T+Td+14.5 10T+Td+13.5 21T+Td+13.5 — — ns 189 DSO (ACK) Asserted to OS0-OS1 Three-state — TBD ns 190 DSO (ACK) Asserted to First DSCK High 3Tc — ns 191 DSO (ACK) Width Asserted: a. when entering debug mode b. when acknowledging command/data transfer 8T+1.1 9T+1.1 8T+4.1 9T+4.1 ns ns 192 Last DSCK Low of Read Register to First DSCK High of Next Command 6Tc — ns 193 DSCK High to DSO Invalid (See note 2) 10.9 — ns 194 DR asserted to DSO (ACK) Asserted 11T+19.5 — ns |
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