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HT45F2020 датащи(PDF) 28 Page - Holtek Semiconductor Inc |
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HT45F2020 датащи(HTML) 28 Page - Holtek Semiconductor Inc |
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28 / 85 page ![]() Rev. 1.00 28 April 11, 2017 Rev. 1.00 29 April 11, 2017 HT45F2020/HT45F2022 Sound Effect Generator Flash MCU HT45F2020/HT45F2022 Sound Effect Generator Flash MCU HIRCC Register Bit 7 6 5 4 3 2 1 0 Name — — — — — — HIRCF HIRCEN R/W — — — — — — R/W R/W POR — — — — — — 0 1 Bit7~2 Unimplemented,readas“0” Bit1 HIRCF:HIRCoscillatorstableflag 0:Unstable 1:Stable ThisbitisusedtoindicatewhethertheHIRCoscillatorisstableornot.Whenthe HIRCENbitissetto1toenabletheHIRCoscillator,theHIRCFbitwillfirstbe clearedto0andthensetto1aftertheHIRCoscillatorisstable. Bit0 HIRCEN:HIRCoscillatorenablecontrol 0:Disable 1:Enable Operating Mode Switching Thedevicecanswitchbetweenoperatingmodesdynamicallyallowingtheusertoselectthebest performance/powerratioforthepresenttaskinhand.Inthiswaymicrocontrolleroperationsthat donotrequirehighperformancecanbeexecutedusingslowerclocksthusrequiringlessoperating currentandprolongingbatterylifeinportableapplications. Insimpleterms,ModeSwitchingbetweentheNORMALModeandSLOWModeisexecutedusing theCKS2~CKS0bitsintheSCCregisterwhileModeSwitchingfromtheNORMAL/SLOWModes totheSLEEP/IDLEModesisexecutedviatheHALTinstruction.WhenanHALTinstructionis executed,whetherthedeviceenterstheIDLEModeortheSLEEPModeisdeterminedbythe conditionoftheFHIDENandFSIDENbitsintheSCCregister. NORMAL fSYS=fH~fH/64 fH on CPU run fSYS on fSUB on SLOW fSYS=fSUB fSUB on CPU run fSYS on fH on/off IDLE0 HALT instruction executed CPU stop FHIDEN=0 FSIDEN=1 fH off fSUB on IDLE1 HALT instruction executed CPU stop FHIDEN=1 FSIDEN=1 fH on fSUB on IDLE2 HALT instruction executed CPU stop FHIDEN=1 FSIDEN=0 fH on fSUB off SLEEP HALT instruction executed CPU stop FHIDEN=0 FSIDEN=0 fH off fSUB off |
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